Article : [SHEET155]
Info : INSPEC Answer Number 15 - 22/02/2000
Info : INSPEC Answer Number 2, le 16/03/2000.
Titre : S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, H. SWIATEK, G. SWIATEK, Semiconductor device failures in power converter service conditions, EPE Journal, Dec. 1998, vol. 7, no. 3-4, pp. 12-17.
Cité dans : [DATA035] Recherche sur les mots clés thermal + fatigue + semiconductor et reliability + thermal + cycle, mars 2004. Cité dans :[REVUE064] EPE Journal, European Power Electronics and Drives, Volume 7, N° 3/4, december 1997. Cité dans : [DATA050] Recherche sur l'auteur S. JANUSZEWSKIAuteur : S. Januszewski
Vers : Bibliographie
Source : EPE Journal
Date : Dec. 1998
Volume : 7, no.3-4
Pages : 12 - 17
Info : Published by EPE Assoc
CODEN : EPJOE4
ISSN : 0939-8368
SICI : 0939-8368(199812)7:3/4L.12:SDFP;1-8
Info : Country of Publication : Belgium, Document_Type : Journal, Treatment_Code : Theoretical
Language : English
Abstract :
The failure analysis of power semiconductor devices (PSD) is
valuable information to make some necessary power converter circuit
correction. Differences between PSD and signal device failures are
described. The main failure mechanisms of SCR thyristors, GTO
thyristors, IGBT transistors and power MOSFETs are discussed.
Failures due thermal fatigue are also given. Selected results with
example photographs of PSD destroyed surfaces are presented. Expert
systems used in PSD failure analysis are described.
Accession_Number : 1999:6242146
The_authors :
Stefan Januszewski received the B.Sc. and M.Sc.Eng degress in electrotechnics from Warsaw
University of Technology in 1953 and 1960 respectively and the Ph.D. degree in power electronic
eng. from the Electrotechnical Institute in 1973. In 1952 he joined the Electrotechnical Institute
(Warsaw) where he worked on the research and development of power electronics equipment and power
semiconductor device measurements. He is author and co-author of more than 110 papers and 7 books
in these fields. He is the chairman of Power Electronics Standard Group in the Polish Standard
Committee as well. He participates in the works of IEC (TC 22 Power Electronics). Presently, he is
assistant professor in the Power Converter Department of the Electrotechnical Institute.
References : 21 refs.
[1] : Aloisi P.:Failure diagnosis in medium power semiconductors. EPE'91 Firenze 1991, pp.3-117...3-119.
[2] : Blackburn D.: Turn-off failure of power MOSFET's. IEEE Trans. on Power Electronics vol. PE-2, No.2, 1987, pp.136-142.
[3] : Blackburn D.: Failure mechanisms and nondestructive testing of bipolar and MOS gated transistors. EPE-MADEP Firenze, 1991, pp.0-252..0-257.
[4] : Bleichner H. et al.: Measurements of failure phenomena in inductively loaded multi-cathode GTO thyristors. IEEE Trans. on Electron. Devices, vol. 41, No. 2, 1994, pp. 251-257.
[5] : Bleichner H.et al.:The effect of emitter shortings on turn-off limitations and device failure in GTO thyristors under snubberless operation. IEEE Trans. on El. Dev., v.42, No.l, 1995, pp. 178-187
[6] : Borras R., Aloisi P., Shumate D.: Avalanche capability of today's power semiconductors. EPE Brighton, vo1.2 Materials and Devices, 1993, pp. 167-172.
[7] : Hayasaki Y.: A consideration on turn-off failure of GTO with amplifying gate. IEEE Trans. on Power Electronics., vol. PE-2, No.2, 1987, pp.90-97
[8] : Januszewski S., Kociszewska-Szczerbik M.: Failure physics of high power thyristors (in Polish). Prace Przemyslowego Instytutu Elektroniki, No.115, 1991
[9] : Januszewski S., Kociszewska-Szczerbik M.: Power semiconductor device failures in converter circuits (in Polish). Prace Instytutu Elektrotechniki No.174, 1993.
[10] : Januszewski S., Kociszewska-Szczerbik M., Swiatek H.: Failure mechanisms of power MOSFET transistors. Proc. of the XIII Symposium: Electromagnetic phenomena in non-linear circuits, Poznañ (Poland), May 1994, pp. 207-212.
[11] : Januszewski S., Kociszewska-Szczerbik M., Swiatek H.: Thyristor service in variable current load conditions (in Polish). Wiadomoaeci Elektrotechniczne, No. 10, 1994,
[12] : Januszewski S., Kociszewska-Szczerbik M., Stypulkowska E., Swiatek H., Swiatek G.: New generation semiconductor device failures in power electronics equipment. International Conference and Exhibition on Power Electronics, Motion Control and Associated Applications. PEMC'94 Sept. 1994 Warsaw (PL), pp. 856-860.
[13] : Januszewski S., Swiatek H.: Modern semiconductor devices in power electronics (in Polish), WNT, Warszawa 1994.
[14] : Januszewski S., Kociszewska-Szczerbik M., Stypulkowska E., Swiatek H., Swiatek G.: Investigation of destroyed parts of surface of high power semiconductor devices in service conditions. Proceedings of the 6th European Symposium Reliability of Electron Devices, Failure Physics and Analysis ESREF'95; Oct. 1995. (France)
[15] : Januszewski S., Kociszewska-Szczerbik M., Swiatek H., Swiatek :Causes and mechanisms of semiconductor device failures in power converter service conditions. EPE'95, Sevilla (Spain).
[16] : Januszewski S., Swiatek H.: Power semiconductor device measurements (in Polish), WKiL, Warszawa 1996.
[17] : Johnson C.M.et al.: Correlation between local segment characteristics and dynamic current redistribution in GTO power thyristors. IEEE Trans.on El. Dev., vo1.41, No.5, 1994, pp. 793-799.
[18] : Matsuda H. et al.: Analysis of GTO failure mode during de-voltage blocking. 1SPSD'94 Davos(Switzerland), May 31-June 2 1994, pp. 221-225.
[19] : Reinmuth K.: A method for non-destructive testing of bipolar transistors, IGBT's and MOSFET's. EPE Firenze 1991, pp. 0-142....0-147.
[20] : Reinmuth K., Amann H.: The ruggedness of paralleled power MOSFET's. EPE Brighten, 1993, pp. 380-384.
[21] : Somos I.L. et al: Power semiconductors empirical diagrams expressing life as a function of temperature excursion. IEEE Trans. on Magnetics, vo1 29, No. l, 1993, pp. 517-522.
Bibliographie |
[1] : [SHEET168] P. ALOISI, Failure diagnosis in medium power semiconductor, EPE'91, Firenze, vol. 3, pp. 117-119. [2] : [PAP158] ------- [3] : [PAP158] ------- [4] : [SHEET275] H. BLEICHNER, M. ROSLING, M. BAKOWSKI, J. VOBECKY, Measurements of failure phenomena in inductively loaded multi-cathode GTO thyristors, IEEE Trans. on Electron. Devices, vol. 41, No. 2, 1994, pp. 251-257. [5] : [PAP158] ------- [6] : [SHEET276] BORRAS0 R., ALOISI P., SUMATE D., Avalanche capability of today's power semiconductors, EPE Brighton, vo1.2 Materials and Devices, 1993, pp. 167-172. [7] : [SHEET277] Y. HAYASAKI, A consideration on turn-off failure of GTO with amplifying gate, IEEE Trans. on Power Electronics., vol. PE-2, No.2, 1987, pp.90-97 [8] : [SHEET278] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, Failure physics of high power thyristors (in Polish), Prace Przemyslowego Instytutu Elektroniki, No.115, 1991 [9] : [SHEET257] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, Semiconductor power devices failures in converter circuits, 1993.
[10] : [SHEET280] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, H. SWIATEK, Failure mechanisms of power MOSFET transistors, Proc. of the XIII Symposium phenomena in non-linear circuits, Poznañ (Poland), May 1994, pp. 207-212. [11] : [SHEET281] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, H. SWIATEK, Thyristor service in variable current load conditions (in Polish), Wiadomoaeci Elektrotechniczne, No. 10, 1994. [12] : [SHEET282] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, E. STYPULKOWSKA, H. SWIATEK, G. SWIATEK, New generation semiconductor device failures in power electronics equipment, International Conference and Exhibition on Power Electronics, Motion Control and Associated A [13] : [SHEET283] S. JANUSZEWSKI, H. SWIATEK, Modern semiconductor devices in power electronics (in Polish), WNT, Warszawa 1994. [14] : [SHEET284] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, E. STYPULKOWSKA, H. SWIATEK, G. SWIATEK, Investigation of destroyed parts of surface of high power semiconductor devices in service conditions, Proceedings of the 6th European Symposium Reliability of Electron D [15] : [SHEET255] S. JANUSZEWSKI, M. KOCISZEWSKA-SZCZERBIK, H. SWIATEK, Causes and mechanisms of semiconductor device failures in power converter service conditions, 1995. [16] : [SHEET286] S. JANUSZEWSKI, H. SWIATEK, Power semiconductor device measurements (in Polish), WKiL, Warszawa 1996. [17] : [SHEET287] C.M. JOHNSON, A.A. JAECKLIN, R.P. PALMER, Correlation between local segment characteristics and dynamic current redistribution in GTO power thyristors, IEEE Trans.on El. Dev., vo1.41, No.5, 1994, pp. 793-799. [18] : [PAP158] ------- [19] : [SHEET285] K. REINMUTH, A method for non-destructive testing of bipolar transistors, IGBT's and MOSFET's, EPE Firenze 1991, pp. 0-142....0-147.
[20] : [SHEET279] K. REINMUTH, H. AMANN, The ruggedness of paralleled power MOSFET's, EPE Brighton, 1993, pp. 380-384. [21] : [SHEET169] I.L. SOMOS, D.E. PICCONE, L.J. WILLINGER, W.H. TOBIN, Power semiconductors empirical diagrams expressing life as a function of temperature excursion, IEEE Transactions on Magnetics, jan. 1993, vol. 29, issue 1, part 2, pp. 517-522.
Mise à jour le lundi 10 avril 2023 à 18 h 59 - E-mail : thierry.lequeu@gmail.com
Cette page a été produite par le programme TXT2HTM.EXE, version 10.7.3 du 27 décembre 2018.
Copyright 2023 : |
Les informations contenues dans cette page sont à usage strict de Thierry LEQUEU et ne doivent être utilisées ou copiées par un tiers.
Powered by www.google.fr, www.e-kart.fr, l'atelier d'Aurélie - Coiffure mixte et barbier, La Boutique Kit Elec Shop and www.lequeu.fr.