EOS/ESD and CMOS Latchup

 

  • Effect of ESD on specific devices and new protection structures
  • Latent damages and damage interpretation
  • ESD modelling and measurement techniques
  • CMOS latchup characterization and modelling
  • Failure analysis of ESD damage

If you would like to contact the IPFA Webmaster, email to natarajan@ieee.org
©
Copyright 2001, IEEE. Terms & Conditions. Privacy & Security.