IRPS'2001, "2001 IEEE International Reliability Physics Symposium", 30 avril - 3 mai 2001, Orlando, Floride.
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Titre : IRPS'2001, 2001 IEEE International Reliability Physics Symposium, 30 avril - 3 mai 2001, Orlando, Floride.
Cité dans : [CONF024] IRPS, International Reliability Physics Symposium, août 2004.
Cité dans : [DIV003] Liste des actes de congrès par années, février 2003.
Info : 2001 IEEE International Reliability Physics Symposium
No. : 39th
Date : April 30, 2001 - May 3, 2001
Article : February 9, 2001
Notification : December 1st, 2000
Résumé : September 15, 2000
Lien : irps/irps2001/default.htm - 7 mai 2001.
Lien : irps/irps2001/irps2001.htm - 24 avril 2001.
Lien : irps/irps2001/irps2001.pdf
Lien : irps/irps2001/pp2001.pdf - 501 Ko, version du 29 janvier 2001.
Site : http://www.irps.org
Vers : Liste des articles
Vers : TABLE OF CONTENTS
Vers : PRODUCT RELIABILITY I
Vers : PROCESS & RELIABILITY INTERACTIONS
Vers : MEMS RELIABILITY CHARACTERIZATION
Vers : PACKAGING AND ASSEMBLY
Vers : OXIDE I
Vers : WLR FOR INTERCONNECTS
Vers : OPTOELECTRONICS AND COMPOUND SEMICONDUCTOR
Vers : ESD/LATCHUP
Vers : PRODUCT RELIABILITY II
Vers : FAILURE ANALYSIS
Vers : PROCESS INDUCED DAMAGE
Vers : INTERCONNECT RELIABILITY
Vers : OXIDE II
Vers : HOT CARRIERS
Info : Call for Papers IRW 2001
[1] : [CONF061] IRW, Integrated Reliability Workshop, IRPS, mai 2004.
Commentaires :
no power devices, no thermal simulations, ok for thin oxide analysis, no french.
Beaucoup d'industriels : AMD, INTEL, Texas Intruments, Motorola, Infineon, Compaq, Aerospace
Quelques Universitaires, l'IMEC
Références :
IEDM, IEEE Trans. on Electron Devices, IEEE E.D. Letter, IEEE IRW, ICMTS, IEEE Trans. on Components, Packaging, and Manufacturing Technology
Vers : PACKAGING AND ASSEMBLY
[1] : [PAP254] S. WEN, L. M. KEER, A Fatigue Theory for Solders, IRPS'2001, pp. 120-127.
[2] : [PAP255] X. MA, Y. QIAN, X. ZHANG, The Concept of Relative Damage Stress and its Application to Electronic Packaging Solder Joint Reliability, IRPS'2001, pp. 128-131.
Vers : OXIDE I
[1] : [PAP285] B.P. LINDER, J.H. STATHIS, D.J. FRANK, Calculating the Error in Long Term Oxide Reliability Estimates, IRPS'2001, pp.168-171.
Lien : irps/irps2001/tutorials/03A.pdf - 70 Ko, 7 pages.
Lien : irps/irps2001/tutorials/03E.pdf - 61 Ko, 7 pages.
Session Co-Chairs: Bob Knoell and Dimitar Dimitrov
Reliability Degradation of High Density DRAM Cell Transistor Junction Leakage Current
Induced by Band-to-defect Tunneling Under the Off-state Bias-temperature Stress
Y.P. Kim, Y.W. Park, J.T. Moon, and S.U. Kim .. 1
A New Method for Predicting Distribution of DRAM Retention Time
Y. Mori, R. Yamada, S. Kamohara, M. Moniwa, K. Ohyu, and T. Yamanaka .. 7
Is Product Screen Enough to Guarantee Low Failure Rate for the Customer?
M.W. Ruprecht, G. La Rosa, and R.G. Filippi .. 12
Analysis of Erratic Bits in FLASH Memories
A. Chimenton, P. Pellati, and P. Olivo .. 17
Individual Cell Measuring Method for FeRAM Retention Testing
N. Tanabe, H. Koike, T. Miwa, J. Yamada, A. Seike,
N. Kasai, H. Toyoshima, and H. Hada .. 23
Yield Enhancement and Yield Management of Silicon Foundries using Iddq "Stress Current Signature"
M. Rubin, D. Leary, and S. Natan .. 28
Applying Dynamic Voltage Stressing to Reduce Early Failure Rate
C.-Y. Tsao, R.Y. Shiue, C.C. Ting, Y.S. Huang, Y.C. Lin, and J.T. Yue .. 37
Session Co-Chairs: Fred Kuper and Walter Riordan
A Study of Formation and Failure Mechanism of CMP Scratch Induced Defects on ILD
in a W-damascene interconnect SRAM Cell
S.-M. Jung, J.S. Uom, W.S. Cho, Y.J. Bae, Y.-K. Chung, K.S. Yu,
K.Y. Kim, and K.T. Kim .. 42
The Effects of STI Process Parameters on the Integrity of Dual Gate Oxides
H. Lim, S.-J. Lee, J.-M. Youn, T.-H. Ha, J.-H. Lim, B.-H. Choi, K.-J. Kim,
H.-J. Kim, K.-T. Kim, and H.-G. Byun .. 48
Improvement in Retention Reliability of SONOS Nonvolatile Memory Devices
by Two-step High Temperature Deuterium Anneals
J. Bu and M.H. White, .. 52
Data Retention Failure in NOR Flash Memory Cells
W.H. Lee, D.-K. Lee, Y.-M. Park, K.-S. Kim, K.-O. Ahn, and K.-D. Suh .. 57
A New Conduction Mechanism for the Anomalous Cells in Thin Oxides Flash EEPROMs
A. Modelli, F. Gilardoni, D. Ielmini, and A.S. Spinelli .. 61
N-Channel Versus P-Channel Flash EEPROM-Which One has Better Reliabilities
S.S. Chung, S.T. Liaw, C.M. Yih, Z.H. Ho, C.J. Lin, D.S. Kuo, and M.S. Liang .. 67
New Technique for Fast Characterization of SILC Distribution in Flash Arrays
D. Ielmini, A.S. Spinelli, A.L. Lacaita, L. Confalonieri, and A. Visconti .. 73
Session Co-Chairs: Danelle Tanner and Susanne Arney
Reliability of a MEMS Torsional Ratcheting Actuator
D.M. Tanner, J.A Walraven, S.M. Barnes, N.F. Smith, F. Bitsie, and S.E. Swanson .. 81
Full Three-Dimensional Motion Characterization of a Gimballed Electrostatic Microactuator
C. Rembe, L. Muller, R.S. Muller, and R.T. Howe .. 91
Non-Destructive Resonant Frequency Measurement on MEMS Actuators
N.F. Smith, D.M. Tanner, S.E. Swanson and S.L. Miller .. 99
Size Effect on the Mechanical Properties and Reliability Analysis
of Microfabricated Polysilicon Thin Films
J.N. Ding, Y.G. Meng, and S.Z. Wen .. 106.
Session Co-Chairs: Tom Moore and S. Sidharth
(invited, ESREF best paper) A Simple Model for the Mode I Popcorn Effect for IC Packages
P. Alpern, K.C. Lee, R. Dudek, and R. Tigner
published in Microelectronics Reliability, Special Issue:
Proc. 11th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2000), pp 1503
Improving Corrosion-Resistance of Silicon-Glass Micropackages Using Boron Doping
and/or Self-Induced Galvanic Bias
B.H. Stark, M.R. Dokmeci, T.J. Harpster, and K. Najafi .. 112
A Fatigue Theory for Solders
S. Wen and L.M. Keer .. 120
The Concept of Relative Damage Stress and its Application to Electronic
Packaging Solder Joint Reliability
X. Ma, Y. Qian, and X. Zhang 128
Session Co-Chairs: Robin Degraeve and Paul Nicollian
(Invited) Physical and Predictive Models of Ultra Thin Oxide Reliability
in CMOS Devices and Circuits
J.H. Stathis .. 132
(Invited) Direct Experimental Evidence Linking Silicon Dangling
Bond Defects to Oxide Leakage Currents
P.M. Lenahan, J.J Mele, J.P. Campbell, A. Y. Kang, R.K. Lowry,
D. Woodbury, S.T. Liu, and R. Weimer .. 150
Nanoscale Observations of the Electrical Conduction of Ultra Thin SiO 2
Films with Conducting Atomic Force Microscopy
M. Porti, M. Nafría, X. Aymerich, A. Olbrich and B. Ebersberger .. 156
Softening of Breakdown in Ultra-thin Gate Oxide nMOSFETs at Low Inversion Layer Density
S. Lombardo, F. Crupi, and J.H. Stathis .. 163
Calculating the Error in Long Term Oxide Reliability Estimates
B.P. Linder, J.H. Stathis, and D.J. Frank .. 168
Session Co-Chairs: J. Joseph Clement and Armin Fischer
Comparison of Isothermal, Constant Current and SWEAT Wafer Level EM Testing Methods
T.C. Lee, D. Tibel, T.D. Sullivan, and S. Forhan .. 172
Real Case Study For Isothermal EM Test As A Process Control Methodology
S.-Y. Lee, J.B. Lai, S.C. Lee, L.H. Chu, Y. S. Huang,
R.Y. Shiue, Y.K. Peng and J.T. Yue, .. 184
Experimental Comparison of Wafer Level Reliability (WLR) and Packaged Electromigration Tests
C. Ryu, T.-L. Tsai, A. Rogers, C. Jesse, T. Brozek, D. Zarr,
M. Adamson, S. Nayak, and J.A. Walls .. 189
Comparison of Via/Line Package Level vs. Wafer Level Results
D. Tibel and T.D. Sullivan .. 194
Session Co-Chairs: Sammy Kayali and J.J. Liou
Accelerated Stressing and Degradation Mechanisms for Si-based Photo-emitters
A. Chatterjee, A. Verma, B.L. Bhuva, E. D. Jansen, and W.-C. Lin .. 200
Low-Temperature, High-Current Lifetests on InP-Based HBT’s
B.M. Paine, S. Thomas III, and M.J. Delaney .. 206
Degradation Characteristics of AlGaN/GaN High Electron Mobility Transistors
H. Kim, V. Tilak, B.M. Green, H. Cha, J.A. Smart, J.R. Shealy, and L.F. Eastman .. 214.
Session Co-Chairs: Robert Gauthier and Jeremy Smith
Characterization And Investigation Of The Interaction Between Hot Electron and
Electrostatic Discharge Stresses Using NMOS Devices in 0.13 µm CMOS Technology
A. Salman, R. Gauthier, W. Stadler, K. Esmark, M. Muhammad,
C. Putnam, and D. Ioannou .. 219
Non-uniform Bipolar Conduction in Single Finger NMOS Transistors
and Implications for Deep Submicron ESD Design
K.-H. Oh, C. Duvvury, C. Salling, K. Banerjee, and R.W. Dutton .. 226
Advanced 2D Latch-up Device Simulation-a Powerful Tool
During Development in the Pre-silicon Phase
S. Bargstädt-Franke and K. Oettinger .. 235
An Analysis of Bipolar Breakdown and its Application
to the Design of ESD Protection Circuits
S. Joshi, R. Ida, P. Givelin, and E. Rosenbaum .. 240
Parasitic Bipolar Transistor Model using Generated-Hole-Dependent Base Resistance
K. Suzuki, H. Anzai, T. Nomura, and S. Satoh .. 246
Design and Analysis of New Protection Structures for Smart Power Technology
with Controlled Trigger and Holding Voltage
V. De Heyn, G. Groeseneken, B. Keppens, M. Natarajan,
L. Vacaresse, and G. Gallopyn .. 253
Session Co-Chairs: Rich Blish and Courtney Black
Historical Trend in Alpha-Particle induced Soft Error Rates
of the Alpha Microprocessor
N. Seifert, D. Moyer, N. Leland, and R. Hokinson .. 259
A Reliability Methodology for Low Temperature Data Retention in
Floating Gate Non-Volatile Memories
P.J. Kuhn, A. Hoefler, T.S. Harp, B.E. Homung, R.E. Paulsen,
D. Burnett, and J.M. Higman 266
High-Performance Chip Reliability from Short-Time-Tests: Statistical Models for Optical Interconnect and
HCI/TDDB/NBTI Deep-Submicron Transistor Failures
A. Haggag, W. McMahon, K. Hess, K. Cheng, J. Lee, and J. Lyding .. 271
An Application-Specific Usage Model for Flash Memory Read Disturb Reliability
T.S. Harp, P.J. Kuhn, J.M. Higman, R.E. Paulsen, and B.E. Hornung .. 280
Session Co-Chairs: Jacob Phang and Travis Eiles
Case History: Novel FA Techniques Used to Recover EEPROM Data from the Swissair 111 Crash
R. Haythornthwaite, A. Earle, A. Rahal, and D. James .. 283
Novel Nondestructive and Non-electrical-contact Failure Analysis Technique - Laser-SQUID Microscopy
K. Nikawa and S. Inoue .. 289
Analysis of Via-Void Generation Mechanism for Giga-bit-scale DRAM
D.H. Kim, J.-S. Park, B.C. Kim, S.-C. Lee, M.-K. Bae, J.W. Nam, I.S. Park, H.Y. Kim,
T.-K. Kim, D.W. Choi, J.Y. Lee, J.-S. Kim, Y.-J. Park, J.-I. Hong, and J.-W. Park .. 294
Study of Metal Impurities Behavior due to Difference in Isolation Structure on ULSI Devices
K. Matsukawa, Y. Kimura, H. Yamamoto, and Y. Mashiko .. 299
High SRAM Standby Current Due to the Printing of Spurious Images
S.-Y. Tang, M. Mims, T. Cynkar, P.J. Marcoux, and D.H. Eaton .. 303
Session Co-Chairs: Terence Hook and Kin P. Cheung
The Impact of Trench Geometry and Processing on the Performance and
Reliability of Low Voltage Power UMOSFETs
S.A. Suliman, N. Gallogunta, L. Trabzon, J. Hao, G. Dolny, R. Ridley T. Grebs, J. Benjamin,
C. Kocon, J. Zeng, C.M. Knoedler, M. Horn, O.O. Awadelkarim, S.J. Fonash, and J. Ruzyllo .. 308
The Effects of Plasma Induced Damage on Transistor Degradation and the Relationship
to Field Programmable Gate Array Performance
F.E. Pagaduan, J.K. Lee, V. Vedagarbha, K. Lui, M.J. Hart, D. Gitlin,
T. Takaso, S. Kamiyama, and K. Nakayama .. 315
Improvement of MOSFET Subthreshold Leakage Current by its Irradiation with
Hydrogen Radicals Generated in Microwave-Excited High-Density Inert Gas Plasma
Y. Saito, H. Takahashi, K. Ohtsubo, M. Hirayama, S. Sugawa, H. Aharoni, and T. Ohmi .. 319
Session Co-Chairs: Timothy Sullivan and James Walls
Reservoir Modeling for Electromigration Improvement of Metal Systems with Refractory Barriers
M.J. Dion .. 327
The Quantitative Assessment of Stress-induced Voiding in Process Qualification
A.H. Fischer and A.E. Zitzelsberger .. 334
Statistics of Electromigration Early Failures in Cu/oxide Dual-damascene Interconnects
E.T. Ogawa, K.-D. Lee, H. Matsuhashi, K.-S. Ko, P.R. Justison, A.N. Ramamurthi,
A.J. Bierwag, P.S. Ho, V.A. Blaschke, and R.H. Havemann .. 341
Trade-off Between Reliability and Post-CMP Defects with Recrystallization Anneal
in Copper Damascene Interconnects
G.B. Alers, D. Dornisch, J. Siri, K. Kattige, L. Tam, E. Broadbent, and G.W. Ray .. 350
Impact of Low-K Dielectrics and Barrier Metals on TDDB Lifetime of Cu Interconnects
J. Noguchi, T. Saitoh, N. Ohashi, H. Ashihara, H. Maruyama, M. Kubo, H. Yamaguchi,
D. Ryuzaki, K.I. Takeda, and K. Hinode .. 355
Session Co-Chairs: Paul Nicollian and Robin Degraeve
Relation Between Breakdown Mode and Breakdown Location in Short Channel NMOSFETs
and its Impact on Reliability Specifications
R. Degraeve, B. Kaczer, A. De Keersgieter, and G. Groeseneken .. 360
Analytic Modeling of Leakage Current Through Multiple Breakdown Paths in SiO 2 Films
E. Miranda, and J. Suñé .. 367
Experimental Study of Gate Voltage Scaling for TDDB under Direct Tunneling Regime
M. Takayanagi, S. Takagi, and Y. Toyoshima .. 380
Accurate and Robust Noise-based Trigger Algorithm for Soft Breakdown Detection in Ultra Thin Oxides
P. Roussel, R. Degraeve, G. Van den bosch, B. Kaczer, and G. Groeseneken .. 386
Soft Breakdown Triggers for Large Area Capacitors Under Constant Voltage Stress
J. Schmitz, H.J. Kretschmann, H.P. Tuinhout, and P.H. Woerlee .. 393
Session Co-Chairs: Giuseppe La Rosa and Roland Thewes
Role of E-E Scattering in the Enhancement of Channel Hot Carrier Degradation of
Deep Sub-Micron NMOSFETs at high V GS Conditions
S.E. Rauch III, G. La Rosa, and F.J. Guarin .. 399
Analysis of New Hot Carrier Degradation Phenomena: "W" or "S" Shape Evolution of LDD NMOSFET
J.-R. Shih, L.H. Chu, J.H. Lee, R.Y. Shiue, Y.K.. Peng, and J.T. Yue .. 406
On the Dominant Interface Trap Generation Process During Hot-Carrier Stressing
D.S. Ang and C.H. Ling, .. 412
A New Physical and Quantitative Width Dependent Hot Carrier Model for Shallow-Trench-Isolated
CMOS Devices
S.S. Chung, S.-J. Chen, W.-J. Yang, and J.-J. Yang .. 419
Hot-Carrier Reliability of P-MOSFET with Ultra-Thin Silicon Nitride Gate Dielectric
I. Polishchuk, Y.-C. Yeo, Q. Lu, T.-J. King, and C. Hu .. 425
Biographies .. 431
Index to Session Paper # .. 452
2001 Committees .. 453
1999 Paper Awards .. 457
2001 Tutorial Program .. 459
2001 Equipment Demonstrations .. 462
[1] : [PAP425] A.H. FISCHER, A.E. ZITZELSBERGER, The quantitative assessment of stress-induced voiding in process qualification, IRPS'2001, April 30 - Mai 3, 2001, Orlando, Floride.
Mise à jour le lundi 10 avril 2023 à 18 h 51 - E-mail : thierry.lequeu@gmail.com
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