SYMPOSIUM L - Sub-Quarter-Micron Silicon Issues in the 200/300 nm Conversion Era

The aim of this Symposium is to provide an overview on R&D activities to transform the semiconductor industry to sub-quarter-micron design rules and larger Silicon substrates. The conversion process to 300 mm wafers was slowed down by the recent critical business conditions in the semiconductor industry. However, the 300 mm Pilot Line in Dresden reported successful production of 64M DRAM’s on this new wafer types. Because of recovery in the semiconductor industry during 1999, many companies announced the re-activation of their 300 mm conversion efforts recently.

The 200/300 mm transition now schedules with the introduction of = 0.13 µm technologies. These technologies require new materials, e.g. for gate stacks, gate electrodes, metal interconnects and insulators. Additionally, alternative substrate materials (SOI, advanced Si-substrates, SiC) for special applications are under discussion.

The symposium should bring together scientists from universities and research laboratories, and engineers from the semiconductor industry, equipment- and materials vendors in order to discuss the issues mentioned. This scientific meeting continues the efforts of the E-MRS started with the First International Scientific Conference on "Techniques and Challenges for 300 mm Silicon" in 1998 and the Symposium "Advances in Silicon Substrates" in 1999.

Scope and Topics:

- Transition to 300 mm Si Wafers

• Material Issues,
• Equipment Issues,
• Processing.

- Alternative Substrate Materials

• SOI,
• Advanced Si-Substrates,
• SiC.

- New Materials and Processes for Sub-Quarter-Micron Technologies

• High K Dielectrics,
• Cu Interconnects,
• Low K Dielectrics.

Scientific Committee: P. Kücher (Semiconductor300, Dresden, Germany), A. Mozer (Wacker Siltronic AG, Burghausen, Germany), N. Inoue (Research Institute for Advanced Science and Technology, Osaka, Japan), G. Ritter (Institute for Semiconductor Physics, Frankfurt (Oder), Germany), K.V. Ravi (Intel, Santa Clara, USA)

List of invited speakers:

• M. Akatsuka (Sumitomo Metal Industries), Japan: Mechanical Properties of 300 mm Wafers
• P. Hahn (Wacker-Siltronic AG), Germany: 300mm Wafer – A Cost and Technology Challenge
• M. Imai (SSI), Japan: Issues for the Large Diameter Epitaxial Wafer
• K. Kawashima (SELETE), Japan: Characterization of Evaluation of 300 mm Wafers for the Giga ULSI Processes
• K. V. Ravi (Intel), USA: Wafer Quality and Wafer Cost Balance in Current and Future Silicon Technologies
• M. Stadtmüller (SC 300), Germany: Production Maturity of 64/256M Furnace and RTP Processes on 300 mm Wafers
• H. Stolz (Applied Materials), Germany: Title to be defined
• P. Gill (Motorola), USA: New Materials for Active and Passive Integrated Devices for Wireless Applications

Symposium Organizers: