S. Bychikhin, M. Litzenberger, R. Pichler, D. Pogany, E. Gornik , "Thermal and free carrier laser interferometric mapping and failure analysis of anti-serial smart power ESD protection structures", ESREF'2001, pp. 1501-1506
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Article : [PAP367]
Titre : S. Bychikhin, M. Litzenberger, R. Pichler, D. Pogany, E. Gornik , Thermal and free carrier laser interferometric mapping and failure analysis of anti-serial smart power ESD protection structures, ESREF'2001, pp. 1501-1506
Cité dans : [DATA227] ESREF'2001, 12th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Arcachon, France , 1-5 octobre 2001.
Auteur : S. Bychikhin
Auteur : M. Litzenberger
Auteur : R. Pichler
Auteur : D. Pogany
Auteur : E. Gornik
Adresse : Vienna University of Technology - Austria
Source : ESREF'2001 - 12th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis - Arcachon - France.
Date : 1-5 octobre 2001
Site : http://www.elsevier.com/locate/microrel
Pages : 1501 - 1506
Lien : private/BYCHIKHIN.pdf - 6 pages, 100 Ko.
Abstract :
Thermal and free carrier distribution during electrostatic discharge (ESD) - like stress are investigated in anti-serial
smart power technology ESD protection devices by using a laser interferometry mapping technique. The
temperature- and free carrier - induced phase shift along the device length and width is studied as a function of stress
current. Two positive phase peaks due to heat dissipation caused by a vertical and a lateral current path are found
under the emitter contact and in the middle of the structure of an active npn transistor, respectively. A negative
phase peak is found at the position of the forward biased pn junction of an inactive transistor, where a high carrier
injection occurs. The positions of hot spots obtained from the thermal mapping method are correlated with the
results of physical failure analysis using the infrared microscopy.
Références : 10
[1] : Murari B., Smart Power ICs, Springer, Berlin 1996.
[2] : Amerasekera A., Duvvury C., ESD in Silicon Integrated Circuit, Wiley, Chichester 1995.
[3] : H. Gossner H, Müller-Lynch T, Esmark K and Stecher M, "Wide range control of the sustaining voltage of ESD protection elements realized in a smart power technology", in Proc. EOS/ESD Symp. 1999, Orlando (USA), 1999, pp. 19-27.
[4] : Duvvury C, Rodriguez J, Jones C, Smayling M, "Device integration for ESD robustness of high voltage power MOSFETs", IEDM Tech.Dig., 1994, pp.407-410.
[5] : Meneghesso G, Santirosi S, Novarini E, Contiero C, Zanoni E, "ESD robustness of smart power protection structures evaluated by means of HBM and TLP tests, Int.Reliab.Phys.Symp., 2000, pp.270-275.
[6] : Mergens M. P. J, Wilkening W, Mettler S, Wolf H, Stricker A and Fichtner W, "Analysis of lateral DMOS power devices under ESD stress conditions" IEEE Tr. Electron Dev., 47, 2000, pp.2128-2137.
[7] : Fürböck C, Pogany D, Litzenberger M, Gornik E, Seliger N, Gossner H, Müller-Lynch T, Stecher M, Werner W, "Interferometric temperature mapping during ESD stress and failure analysis of smart power technology ESD protection devices", J. Electrostatics, vol. 49, 2000, pp. 195-213; also in Proc. EOS/ESD Symp. 1999, Orlando (USA), 1999, pp. 241-250.
[8] : Fürböck C, Esmark K, Litzenberger M, Pogany D, Groos G, Zelsacher R, Stecher M, and Gornik E, "Thermal and free carrier concentration mapping during ESD event in smart power ESD protection devices using an improved laser interferometric technique", Microel. Reliab., Vol. 40, 2000, pp. 1365-1370.
[9] : Litzenberger M., Esmark K, Pogany D, Fürböck C, Gossner H, Gornik E and Fichtner W, "Study of triggering inhomogeneities in gg-nMOS ESD protection devices via thermal mapping using backside laser interferometry", Microel. Reliab., Vol. 40, 2000, pp.1359-1364.
[10] : Pogany D, Seliger N, Litzenberger M, Gossner H, Stecher M, Müller-Lynch T, Werner W and Gornik E, "Damage analysis in smart power technology electrostatic discharge (ESD) protection devices", Microel. Reliab., vol. 39, 1999, pp. 1143-1148.
[1] : [SHEET485] H. Gossner, T. Müller-Lynch, K. Esmark, M. Stecher, Wide range control of the sustaining voltage of ESD protection elements realized in a smart power technology, Proc. EOS/ESD Symp. (1999) 19-27.
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