W.W. LEE, L.T. NGUYEN, G.S. SELVADURAY, "Solder joint fatigue models: review and applicability to chip scale packages," Microelectronics Reliability, Vol. 40, No. 2, 2000, pp. 231-244.
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Article : [PAP256]
Titre : W.W. LEE, L.T. NGUYEN, G.S. SELVADURAY, Solder joint fatigue models: review and applicability to chip scale packages, Microelectronics Reliability, Vol. 40, No. 2, 2000, pp. 231-244.
Cité dans :[REVUE167] Elsevier Science, Microelectronics Reliability, Vol. 40, Issue 2, pp. 191-364, 28 February 2000.
Cité dans :[PAP254]
Cité dans :[ART538]
Auteur : W. W. Lee - (a)
Auteur : L. T. Nguyen - (a)
Auteur : G. S. Selvaduray - (b)
(a) : National Semiconductor, P.O. Box 58090, Mail Stop 19-100, Santa Clara, CA 95052, USA
(b) : Department of Materials Engineering, San Jose State University, One Washington Square, San Jose, CA 95192, USA
Journal : Microelectronics Reliability
Volume : 40
Number : 2
Pages : 231 - 244
Date : 2000
Stockage : Thierry LEQUEU
Lien : private/Nguyen.pdf - 14 pages, 245 Ko.
Lien : PAP254.HTM#Bibliographie - référence [6].
Lien : ART538.HTM#Bibliographie - référence [5].
Info : Received 13 April 1999; received in revised form 10 June 1999
Vers : Bibliographie
Abstract :
A review of fourteen solder joint fatigue models is presented here with an emphasis on summarizing the features
and applications of each fatigue model. The models are classi®ed into ®ve categories: stress-based, plastic strain-
based, creep strain-based, energy-based, and damage-based. Fatigue models falling outside these categories are
categorized as `other empirical models'. Each model is presented under one category with the relevant parameters
and applicable packages. Following each category, common issues such as thermal cycling conditions, solder joint
geometry, and coverage are addressed. Two fatigue model application scenarios are discussed. In the ®rst scenario, a
set of existing fatigue test data is given to the engineer who must determine how best to interpret the data and
which fatigue model(s) best apply. In the second scenario, a test scheme must be devised for a new chip scale
package product. The number of cycles to failure (Nf ) or fatigue life must be determined. A general procedure is
presented for choosing an appropriate fatigue model(s) based on the package conditions and limited Finite Element
Analysis time. This procedure is summarized in a fowchart.
Article_Outline :
1. Introduction
2. General approach to fatigue modeling
2.1. Fatigue failure
2.2. Fatigue models
2.2.1. Plastic strain fatigue models
2.2.2. Creep strain fatigue models
2.2.3. Energy-based models
2.3. Damage fatigue models
2.4. Other empirical models
3. Practical engineering application guidelines for application of fatigue modeling to a CSP style ball interconnect
4. Summary
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