J. YAMASHITA, N. SOEJIMA, H. HARUGUCHI, "A novel effective switching loss estimation of non-punchthrough IGBTs", ISPSD'97, pp. 109-112

J. YAMASHITA, N. SOEJIMA, H. HARUGUCHI, "A novel effective switching loss estimation of non-punchthrough IGBTs", ISPSD'97, pp. 109-112 Copyright - [Précédente] [Première page] [Suivante] - Home

Article : [99ART112]

Titre : J. YAMASHITA, N. SOEJIMA, H. HARUGUCHI, A novel effective switching loss estimation of non-punchthrough IGBTs, ISPSD'97, pp. 109-112

Cité dans : [CONF007] ISPSD, Internationnal Symposium on Power Semiconductor Devices & Integrated Circuits
Cité dans :[99ART137] MIYASHITA S., YOSHIWATARI S., KOBAYASHI S., SAKURAI K., Progress in development of high power NPT-IGBT module, ISPSD'98, pp. 285-288, 3-6 June 1998.

Auteur : Yamashita, J.
Auteur : Soejima, N.
Auteur : Haruguchi, H - Power Device Div., Mitsubishi Electr. Corp., Fukuoka, Japan

Stockage : Thierry LEQUEU
Lien : private/Yamashita1.pdf - 260 Ko.
Source : Power Semiconductor Devices and IC's, 1997. ISPSD '97., 1997 IEEE International Symposium on
Pages : 109 - 112
Date : 26-29 May 1997
ISBN : 0-7803-3993-2
Info : IEEE Catalog Number: 97CH36086
Info : Total Pages : 375
References : 8
Accession_Number : 5703894

Abstract :
IGBTs have two concepts of the structure, the punchthrough type
(PT) and the non-punchthrough type (NPT). The NPT-IGBT may be
fabricated at low cost compared with the PT-IGBT. For example,
the NPT-IGBT may be fabricated on a floating zone wafer, but the
PT-IGBT is fabricated on a wafer by epitaxial growth. However,
the NPT-IGBT has higher switching loss than the PT-IGBT because
of the thicker n-drift region. In this paper, switching loss of
NPT-IGBTs is estimated and compared with that of a 1200 V class
PT-IGBT. Also, VVVF inverter loss is calculated using
experimentally obtained switching loss. Finally, thin NPT-IGBT's
switching loss is estimated and compared with that of the
PT-IGBT.

Subject_terms :
insulated gate bipolar transistors; nonpunchthrough IGBTs;
punchthrough IGBTs; switching loss estimation; floating zone
wafer; epitaxial growth; n-drift region; VVVF inverter loss;
numerical device simulation; 1200 V

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