Session 8: LD MOSFETs
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Wednesday, June 6, 13:40-15:45, 5F Main Hall
Chairperson: M. Briere, Cherry Semiconductor
H. Kitaguchi, Oki Electric Industry Co.,
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8.1 Avalanche-Induced Thermal Instability in LDMOS Transistors
P.L. Hower, C.-Y. Tsai, S. Pendharkar, E. Efland, R. Steinhoff and J. Brodsky
Texsas Instruments, U.S.A.
8.2 Robustness of LDMOS Power Transistors in SOI-BCD Processes and Derivation of Design Rules Using Thermal Simulation
B.H. Krabbenborg and J.A. van der Pol
Philips Semiconductors, The Netherlands
8.3 Using Two-Dimensional Filament Modeling to Predict LDMOS and SCRLDMOS Behavior under High Current ESD Conditions
S. Pendharkar and P. Hower
Texas Instruments, U.S.A.
8.4 Improvement of Breakdown Characteristics of LDMOSFETs with Uneven Racetrack Sources for PDP Driver Applications
T.M. Roh, D.W. Lee, J. Kim, J.G. Koo and K.-I. Cho
ETRI, Korea
8.5 0.6ƒÊm BiCMOS Based 15 and 25V LDMOS for Analog Applications
Y. Kawaguchi, K. Nakamura, k. Karouji, K. Watanabe, Y. Yamaguchi and A. Nakagawa
Toshiba, Japan