Discussion Group Questionnaires
October 1999
Dear IRW´98 attendee,
We would like to ask you to fill out the questionnaires of both discussion groups which you will attend during IRW´99. A short summary of the discussion groups are provided on a seperate Web page.
This year the following five discussion groups are organised for the workshop:
Your answers will give the discussion group moderators feedback about your experience and interests regarding the discussion group topics. The collected information will be the basis of the discussion. Therefore, it is important for you to answer the questionaire and have an input in which direction the discussion will go.
Please, send the answers via e-mail to the moderator who is mentioned below the questionnaire. You should include own suggestions for the discussion.
Thank you very much for your time and cooperation. We are looking
forward meeting you at the camp in October´99.
Linda Head and
Prasad Chaparala
(IRW´99 Discussion Group Chairs)
Discussion group moderator: Alain Bravaix, ISEM, France
- Do you experience device reliability for developments of new technologies?
Yes / No
- What are the standard tests you use for device reliability evaluation?
- What are the standard tests you use for gate-oxide reliability evaluation?
- Do you have experience with Hot-Carrier Degradation in CMOS technologies?
Yes / No
- Do you have experience with Hot-Carrier Degradation in memory cells?
Yes / No
- Do you observe Hot-Carrier Degradation in other technologies?
Yes / No
If Yes, please list the processes.
- What are the critical device / technology dimensions where you must assess potential Hot-Carrier problem?
- Do you / your company apply AC stressing experiments on
- devices? Yes / No
- simple circuits? Yes / No
- complex circuits? Yes / No
- if yes, which type of circuits do you use?
- Do you use quasi-static extrapolations for lifetime extrapolations?
Yes / No
- Do you study device reliability for design considerations on a simulation basis?
Yes / No
- Do you study device reliability for transistor optimization?
Yes / No
- Can you observe a trend in the Hot-Carrier degradation mechanisms?
Yes / No
If no, is it similar to what you have observed in older technologies?
Yes / No
- Is the Hot Carrier problem correlated to the gate-oxide reliability?
Yes / No
Please, give your opinion:
- What are the most limiting Hot Carrier aspects for next technology generations?
- Please add any further suggestions for the discussion points.
Contact person: Alain Bravaix
ISEM, France
e-mail: bravaix@isem.tvt.fr
Fax: ++ 33 4 9403 8951
Back to the top of this page.
Discussion group moderators: Tim Sullivan, IBM, U.S.A. and Harry Schafft, NIST, U.S.A.
- What issues would you most like to discuss in this discussion group?
- Can the same tests be applied to Al-alloy and Cu metallization?
- For Al-alloys
- What failure criterion should be used?
- Should one or several test structures be employed?
- NIST
- Stud/via structures or chains
- Different widths, lengths
- Can the results of the different structures be related to each other?
- Can several structures be used together to get a multi-viewed picture?
- Do all levels of metal need to be tested?
- For Cu
- Is high temperature necessary?
- Are there fundamentally behavior differences from Al?
- Is conventional module-level EM testing necessary, or will wafer level testing do?
- For wafer level testing
- Are results suitable for lifetime projection, or for line monitoring (or both?)?
- What test algorithm is best, and why?
- Isothermal
- Constant current
- SWEAT
- Do different stress conditions alter results?
- Is self heating important?
- Can it be adjusted for?
- Is there a model for it?
- What issues are there with structures in Low-K dielectric?
Contact person: Tim Sullivan
IBM Microelectronics, U.S.A.
e-mail: tdsulliv@us.ibm.com
Fax: ++ 1 / 802 769-1220
Back to the top of this page.
Discussion group moderators: Emmanuel Vincent, France and John Suehle, NIST, U.S.A.
- Origin of the attendees:
- In which field are you currently working?
Industry
Academic laboratory
Consultant
Manufacturing
R&D
- Do you have experience with oxide testing?
Yes / No
- Area of interest of the attendees:
- What type of dielectrics are you working on?
SiO2
Ta2O5
SiN
SiON
Other, please specify.
- What dielectric thickness range do you assess?
>10nm
7-10nm
5-7nm
3-5nm
<3nm
- What type of stress do you use to test oxides for:
- Evaluation during development phase:
- Constant Current Stress (CCS)
- Constant Voltage Stress (CVS)
- Linear Ramp Voltage Stress (LRVS)
- Exponential Ramp Current Stress (ERCS)
- Other, please specify.
- Production monitoring:
- CCS
- CVS
- LRVS
- ERCS
- Other, please specify.
- What type of oxide failure modes do you address?
- Breakdown
- Quasi-breakdown
- Stress-Induced Leakage Currents (SILC)
- Other, please specify.
- How do you detect Quasi-breakdown events?
- I/V change
- Low field check
- Noise
- Other, please specify.
- Do you take new failure modes into account for reliability prediction ?
Yes / No
- To your opinion and experience, is quasi-breakdown a real issue in itself and for the circuit functionality ?
- Is intrinsic oxide reliability still worth being investigated ?
- Is there a topic you want to discuss during the IRW discussion meeting ? (If yes, do not hesitate to prepare a couple of foils to be presented to your peers)
Contact person: Emmanuel Vincent
ST Microelectronics, France
e-mail: Emmanuel.VINCENT@st.com
Fax: ++ 33 476 926444
Back to the top of this page.
Discussion group moderators: Rolf-Peter Vollertsen, Infineon Technologies Corp., U.S.A. and Raif Hijab, Cirrus Logic, U.S.A.
- Do you have experience with Burn In?
Yes / No
- Do you / your company apply Burn In?
Yes / No
- Can Burn In be the only screen applied?
Yes / No
- What are the most significant disadvantages of Burn In to your opinion?
- What kind of damages due to Burn In did you observe?
- How can we verify if the intrinsic properties are affected/degraded by Burn In?
- How could Burn In be optimized?
- Which future Burn In requirements do you foresee?
- Can Burn In be replaced by other screens?
Yes / No
- If "yes": By which?
- If "no": please, give some reasons.
- What percentage of your product designs are or can be Iddq tested, and does that get you out of burn-in?
- Can you provide examples of the correlation of burn-in to WLR or in-line data?
- Do you have data or burn-in concepts you might present in a poster?
- Any further suggestion for the discussion?
(feel free to prepare a summary foil to introduce a topic during the IRW discussion)
Contact person: Rolf Vollertsen
Infineon Technologies Corp., U.S.A.
e-mail: rvollertsen@dda.siemens.com
Fax: ++ 1 / 802 769-1220
Back to the top of this page.
Discussion group moderators: Carole Graas, Infineon Technologies Corp., U.S.A. and Ehren Achee, Centaur Technology, U.S.A.
- Which field do you work in?
Please state one:
- Technology Development
- Equipment Development
- S/C Production
- Academia
- Government Lab
- Research
- Procurement
- Foundry
- Component User
- Other, please state area !!
- Do you or your department currently perform WLR measurements or use WLR test data?
Yes / No
- Who is encouraging your interest/use in WLR?
Please, state as many as relevant:
- Customers
- Self interest
- Co-workers
- Other, please specify !!
- What is your primary purpose of the WLR tests?
Please, state as many as relevant:
- Data gathering
- Experimental
- Monitoring
- Tool/test development
- Other, please specify !!
- Is your company strategy/ working result based on WLR results?
Yes / No
If Yes, please specify !!
- Is your WLR data taken at the same rate as WAT/E-test data?
Yes; No; Depends; Do not know; please specify !!
- Do you believe that some WLR tests could be shortened?
Yes / No
If Yes, please specify which one:
- Qbd
- Hot carriers
- EM
- SM
- Intra/inter level dielectrics
- Plasma charging
- Other, please specify !!
- What improvements need to be made in order to make WLR tests
more useful ?
Please, state as many as relevant:
- Models
- Correlations with module tests
- Test Structure Designs
- Standardization
- Industry acceptance
- Decrease test time
- Increase test time
- Other, please specify !!
- How should improvements be made?
Please, state as many as relevant:
- Vendors should drive improvements
- S/C manufacturers should drive improvements
- More research
- More cooperations, joint projects
- Other, please specify !!
- Do you have ideas or results you would like to present
during the discussion ? (please bring handouts/overheads to the IRW)
- Do you have some other hot topics, comment or questions about WLR?
Contact person: Carole Graas
Infineon Technologies Corp., U.S.A.
e-mail: cgraas@dda.siemens.com
Fax: ++1 / 802 769 4404
Back to the top of this page or to the IRW´99homepage.
Last modifications 12. Octobber 1999 by Andreas Martin.