Impact of Technology Scaling and Logic Design Style on the Core Logic SER of Microprocessors

Recent studies have shown that the core logic of microprocessors is becoming increasingly susceptible to single event upsets and can no longer be neglected. This talk analyzes the impact of technology scaling and internal logic design on the soft error rates at the device, circuit, and system levels.

Norbert Seifert

Norbert Seifert received the M.S. and Ph.D. (1993) in solid state physics from Vanderbilt University and the Technical University ofVienna, respectively. His doctoral research involved the study of defect formation in wide bandgap materials under space-like conditions. He conducted research as a postdoctoral associate from 1993 until 1997 at North Carolina State University and at the Technical University of Vienna. Since 1997 he has been a member of the Alpha Development Group for Digital Equipment Corp., now Compaq Computer Corp, where he has held a variety of engineering positions in device physics, wafer-level reliability and design.