IRPS has long been recognized as the premier conference for the exchange of information about the reliability of semiconductor devices and microelectronic assemblies. This year’s technical program meets that expectation and, in fact, breaks new ground as we seek to meet the challenges posed by the current world political condition.
When we last met in April 2001, radiation damage to semiconductor devices was a highly specialized topic that was addressed mainly by aerospace and defense entities to assure reliable performance of circuits and systems in the harsh radiation environment of outer space. The events of September 11 and those that followed have broadened our perspective. To prevent the spread of bacteria through the US Postal System, mail within the United States is being irradiated at levels beyond those that devices experience in outer space applications. As we go to press with this Advance Program, several papers are being prepared to document the effects of specific levels of radiation on semiconductor devices as they are irradiated while passing through the US mail and to devise and establish guidelines to protect sensitive devices. With the broader application of electronic devices, e.g., smart cards, there is great concern that devices may not survive shipment to the customer. The irradiation poses a hazard to device survival, and the forum to hear the latest about mitigation of these hazards is IRPS. Be sure to check the IRPS web site (http://www.irps.org/) for updates to the technical program as we add these timely papers to the lineup.
The program for 2002 consists of 65 papers (8 of which are invited presentations by experts in their respective fields), 26 tutorials (with a basic track and an advanced track) over two days (Sunday and Monday), and a full slate of workshops on Wednesday evening. The keynote speaker is Dr. Bernard S. Meyerson, Vice-President at IBM’s Communication, Research and Development Center. His talk will address the challenges of integrated circuit operation at frequencies above and beyond 100 GHz, including decreasing "breakdown" voltages for high-speed devices and new loss mechanisms for passive devices operating at high frequencies. We have also added a poster session on Tuesday evening that will be combined with the Tuesday evening reception. Seventeen posters describing original work will be available for your review, and the poster authors will be available for one-on-one discussion of their work with you. As part of the Tuesday reception, we will also feature an address by Jack Kilby, the noted Texas Instruments inventor and 2000 Nobel Prize laureate. Jack Kilby played an important role in the invention of the integrated circuit, and he honors the Symposium with his presence. As has been our custom for the past few years, Thursday morning will feature a panel discussion on "Product Qualification in the 21st Century" which should be of great interest to attendees representing both suppliers and users of semiconductor devices.
Our program begins at 8:00 AM on Tuesday with the keynote address by Dr.Meyerson. This is followed by a plenary session on non-volatile memory (NVM). Six papers addressing NVM reliability issues will be presented in a session dedicated to this new topic. The afternoon begins the parallel sessions with four papers in the Dielectric session and four in a session on MEMS (two invited papers). These are followed by parallel sessions on Hot Carriers (5 papers) and Assembly and Packaging (4 papers-3 invited). Tuesday’s technical program culminates in the Tuesday evening poster session and reception.
The Wednesday sessions begin with five papers on ESD/Latchup (one invited) and four papers on Failure Analysis. Following ESD and FA, we have parallel sessions on Compound Semiconductors and Product Reliability. Each of the sessions features six top-notch papers in their respective fields. The Wednesday technical sessions conclude with parallel sessions on Device and Process (5 papers) and Interconnects (6 papers-one invited). The Workshops then run on Wednesday evening from 7:30-9:30 PM.
Thursday features a plenary session on Process-Induced Damage with 5 papers, one of which is invited. The PID plenary session is followed by a panel discussion entitled "Product Qualification in the 21st Century". The panel will feature representatives from both supplier and user companies who will discuss their qualification strategies and how the needs of users can be met through dialogue between the suppliers and users. The Symposium concludes with a second Dielectric plenary session featuring five papers.
The Symposium promises to be both current and topical to today’s technological challenges. I am grateful to the members of the Technical Program Committee for their help in assembling this program and their ongoing efforts to make this Symposium a value that you simply cannot pass up. We look forward to seeing you, meeting with you, and talking with you in Dallas in April.
Bernie Pietrucha
Technical Program Chair