Congress Center of Aix-en-Provence (same place as for conference), Sunday March 30, 2003.
Please contact Mr Marcel Meuwissen, at TNO (The Netherlands) email to m.meuwissen@ind.tno.nl
Submitting a tutorial proposal
We invite you to submit a tutorial proposal to be considered for presentation. Courses will last 3 to 4 hours.Contents of courses
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| Timing | Event | Courses | |||
|---|---|---|---|---|---|
| 8h00 | Registration | ||||
| 9h00 | Start morning courses | C1: Moisture related reliability in polymers (Fan) | C4: Experimental Characterisation of Electronic Components and System Thermal Performance (Rodgers) | C5: Coupled-field Predictive Simulation for Virtual Test and Characterization of Microsystems (Wachutka) | |
| 10h30 | Coffee break | ||||
| 10h50 | Resume courses | C1 (continued) | C4 (continued) | C5 (continued) | |
| 12h30 | Lunch | ||||
| 13h30 | Start afternoon courses | C2: Introduction to IC process reliability (Martin) | C3: Recent Challenges for Experimental and Theoretical Reliability Assessment (Dudek, Auersperg) | C4 (continued) | C6 Advanced packaging (Chan) |
| 15h00 | Coffee break | ||||
| 15h20 | Resume courses | C2 (continued) | C3 (continued) | C4 (continued) | C6 (continued) |
| 17h00 | End of courses | ||||
| until 17h30 | Conference registration | ||||
Duration: half-day (3 – 3.5 hours)
Instructor: Xuejun Fan (Philips Research Lab, USA)
Summary:
The realization of virtual prototyping depends on the capability and reliability of multi-physics modeling. This course focuses on the methods and solutions in multi-physics modeling, including the moisture diffusion, hydroswelling, vapor pressure, delamination and fracture modeling. The emphasis will be given to the implementations of these modeling techniques and methods into the commonly used commercial softwares such as ANSYS, ABAQUS and MARC. The course will also cover the material characterizations (diffusion properties, hydroswelling measurement, and the interface toughness characterization at high temperature, etc), and the verifications of the modeling results against experiments. Several case studies including CSP, FC-BGA and QFN packages will be presented to illustrate that the integrated modeling approaches with necessary material characterizations will yield much better understandings in the package development and design.
Course Outline
About the instructor:
Xuejun Fan received his Ph.D. degree in mechanical engineering from Tsinghua University, Beijing, China in December 1989. He is currently a Senior Member of Research Staff in Philips Research Lab-USA. He was with the Institute of Microelectronics (IME), Singapore as a Member, Technical Staff from September 1997 to September 2000. He was invited to give keynote lectures at 1st and 3rd EuroSime on moisture related reliability issues in electronic packaging, and is the technical committee member of Eurosime conference.
Duration: half-day (3 – 3.5 hours)
Instructor: Andreas Martin (Infineon Technologies AG, Germany)
Summary:
Introduction
Integrated circuits must meet customers requirements, for example 15 years lifetime at 125°C and a maximum allowed failure rate of 100 parts per million (ppm). Subsequently, the process line must achieve those specified targets. Highly accelerated reliability stresses are performed to assure the customer the required quality. The reliability is strongly dependent on process materials, device layout, process steps and treatments. First, at the implementation stage any process is qualified on test chips for the customer reliability target. Second, the stability of the reliability of the process line during high volume manufacturing is a key aspect for complex digital and analog integrated circuits and is therefore, monitored on scribe line test structures of product wafers.
Objectives
The goal of this half-day course is to give an overview of state-of-the-art process reliability issues such as, accelerated stress measurements, (self-heating) test structures, physical/predictive models and related calculations/simulations which are required to assess/achieve the process reliability for the product target. Also the course aims for the introduction of the most relevant reliability diagrams, models and termonologies commonly used in semiconductor industry.
Who should attend?
The course will benefit engineers, scientists and managers who are in the field of processing, process and circuit simulation with the intention to include reliability hazards and any aspect of IC quality, reliability, failure analysis or product target prediction either on side of the IC manufacturer or on the side of the IC vendor.
Course Description
The course is structured in three main parts. After a general introduction briefly reviewing the basic CMOS process the first part will describe the reliability concepts for the verification of the interconect scheme. In the second part the significant dielectric layer reliability topics will be presented. In the third part the CMOS device reliability will be discussed. Finally the course will be concluded. All parts will include a wide span of reliability investigation schemes from testing durations of weeks to test times of seconds.
The first part consists of a detailed introduction to the reliability of an IC interconnect scheme. It will be pointed out that new process technologies encounter different problems due to a radical changes from aluminum to copper for the interconnect material and from SiO2 to low-k-materials as insulation between interconnects. The various degradation modes will be described. The correct design of test structures including thermal and electrical simulations as well as the design of experiment is vital for the verification of a reliability target. Models and reliability plots will be introduced and explained.
In the second part, one of the most significant process step, processing a dielectric layer will be assessed in terms of reliability performance. Dielectric layers are a key feature for CMOS devices used in logic or memory applications as well as for insulation layers in interconnect schemes of any IC. The total area of dielectrics of an IC easily exceeds the total area of the chip. The reliability of those layers is vital for the functionality of the circuit and can be verified in various ways. Different materials and stacks, processing options or structure layout have huge impacts on the reliability performance. Predictive models will be presented and the physical background explained for the understanding of the dielectric layer degradation. Typical graphs and plots will be shown in order to be able to classify any of those dielectric reliability diagrams in the future.
The third part will deal with CMOS device reliability. The functionality of CMOS devices can degrade seriously over time. The key factors of the degradation are the operating conditions, the device geometry and process instabilities. The various degradation causes and the most common device degradation models will be presented. The accelerated stress measurements and significant types of reliability diagrams will be described. Also the temperature stability, its testability and the possibility of circuit simulation will be highlighted.
Course Outline About the instructor:
Andreas Martin has over ten years of experience in the field of process reliability. After his study of Electronic Engineering in the Technical University of Darmstadt, Germany he has done 6 years of research in predictive dielectric reliability models in the National Microelectronics Research Centre (NMRC) of Cork, Republic of Ireland. He holds a masters degree in Electronic Engineering / Microelectronics. Currently, he is with the central Reliability Methodology department of Infineon Technologies AG in Munich, Germany, where he does development and research work in the field of fast Wafer Level Reliability tests and WLR data analysis in his fifth year for Infineon worldwide for logic and memory technologies. His areas of interests are dielectric stress measurements, plasma induced damage and the design of state-of-the-art test structures for reliability testing.
He has published or co-authored over 30 publications besides a numerous number of Infineon-internal research notes. He is memeber of the IEEE Reliability society. For the last 9 years he has been involved in the Organisation ot the IEEE Integrated Reliability Workshop (IRW) which he has organised as General Chair in 2001. His involvement in the JEDEC subcommittee 14.2 includes the Foundary Qualification Procedure, Dielectric Reliability Testing and Plasma Induced Damage Testing. He is involved in the organisation of the Workshop on Dielectrics in Microelectronics (WoDiM) since 1992. He had hosted WoDiM 2000 as General Chair in Munich. He also coordinates a wafer level reliability subcommittee of the VDE in Germany.
Duration: half day
Instructors: Rainer Dudek and Jürgen Auersperg (Fraunhofer IZM, Germany)
Summary:
Course objectives
The course focuses on thermo-mechanical issues of microelectronics packaging. FE strategies and methodologies are presented, and their theoretical background for the prediction of physical parameters impacting on thermo-mechanical behavior, such as local stresses and strains, is outlined. Detailed insight into the non-linear constitutive description of electronic materials is provided, especially concerning solder materials. For the implementation of lead-free solders in electronic packaging, knowledge of lead-free solder materials is provided concerning mechanical properties, solder joint reliability tests, failure analysis and fatigue life prediction. Additional application examples for the analysis methods presented towards failure prediction of advanced packaging technologies are given, including experimental verification.
Who Should Attend
Design, manufacturing, quality and reliability professionals who are involved in thermo-mechanical issues or reliability of electronic systems, especially those interested in FE-simulations for solder interconnects and packaging solutions for advanced electronic assemblies.
Course content
About the instructors:
Rainer Dudek received the Ph.D. degree in mechanical engineering from the University of Technology Chemnitz, Germany, in 1986. From 1986 to 1993, he was with the Institute for Mechanics, Department of Fracture and Micromechanics, Chemnitz. He joined the Fraunhofer Institute for Reliability and Microintegration (IZM), Berlin in 1993. He has been working on nonlinear finite element analysis with respect to different advanced material applications since 1980. His current research interests are in the area of design-for-reliability of electronic packages, with emphasis on constitutive modeling and failure prediction for electronic materials. Dr. Dudek has given many lectures on thermo-mechanical FE-simulation related issues in microsystem packaging at national and international workshops and conferences. He is a member of the conference program committee of the international ESIME conference. He has authored and co-authored many technical publications at international journals and conferences, two of them awarded with “best paper prizes”.
Jürgen Auersperg received his Ph.D. in applied mechanics from the Chemnitz University of Technology, Germany in 1980 . He joined Fraunhofer IZM, Dept. Of Mechanical Reliability and MicroMaterials as a senior scientist in 1996 and is head of the group "Nanomechanics and Micromechatronics". Furthermore, he is responsible for numerical simulations at the AMIC company in Berlin since 1999.His specialties are nonlinear finite element simulation, fracture and damage mechanics, fatigue and failure analysis of microelectronic components.
Duration: full day (7 hours)
Instructor: Peter Rodgers (Electronics Thermal Management, Ltd., Ireland)
Summary:
Introduction
To satisfy consumer demands for more compact and sophisticated electronic devices, advances of semiconductor technology have achieved increased Integrated Circuit (IC) functionality and miniaturisation. However, the continuous increase of both switching speed and transistor density, still described by Moore's law, have inadvertently resulted in rising die heat fluxes, which, if not efficiently removed from the device, may impact on product performance and reliability. While no generic relationship exists to relate component and Printed Circuit Board (PCB) temperature with reliability, it has been shown that die circuit performance can be highly sensitive to operating temperature, and therefore temperature must be controlled.
This need, combined with the demand for more reliable electronic systems, has heightened the requirement for accurate characterisation of product thermal performance. Although thermal design practices have evolved to a high reliance on virtual prototyping using numerical predictive techniques, relying solely on numerical predictions without experimental analysis still remains an unreliable design strategy. An efficient thermal design process therefore requires a balanced combination of experimental and numerical efforts, whereby experimentation is used to both provide critical physical boundary conditions for numerical analysis and verify the numerical models. Ultimately, experimental characterisation is necessary to assess the effectiveness of the cooling design both at system level and locally at critical component locations, from which component reliability, hence product life, can be estimated.
This course covers the fundamentals of thermofluid measurements to characterise electronics thermal performance, from component to system level. The principles and application of experimental techniques to measure the critical physical parameters involved, such as temperature, fluid flow and heat transfer, are reviewed. Specific methods for characterising important system elements, such as IC packages, populated boards, racks, heat sinks, fans, and grilles/vents are outlined. Electronics thermal characterisation standards, and both standard and non-standard characterisation environments are reviewed. Practical case studies dealing with the thermal characterisation of telecommunication products are presented.
Course objectives
This course provides experimental strategies and methodologies to characterise electronic system thermal performance, from component to system level. The application of these techniques will permit the thermofluid phenomena in a given application to be understood, will guide the thermal design process and ultimately permit product thermal performance to be qualified.
Who should attend?
The course will benefit engineers, managers and scientists involved in the thermal management, thermo-mechanical issues or reliability of electronic systems. It is aimed at participants with varying expertise levels in thermal management, from novice to advanced.
Course outline
About the instructor:
Dr. Peter Rodgers is director of Electronics Thermal Management Ltd., a research and consulting firm specialised in electronics cooling. He holds a Ph.D. degree in mechanical engineering from the University of Limerick, Ireland and has been involved in electronics thermal management for thirteen years. Dr. Rodgers was formerly with the Nokia Research Center, Finland, where he consulted on electronics thermal management within the corporation, and lead a three-year research programme on benchmarking the predictive accuracy of CFD codes dedicated to the thermal analysis of electronic equipment. For publications associated with this work, he was awarded the 1999 Harvey Rosten Award for Excellence. He has an extensive experimental background in electronics cooling, which includes the development of advanced experimental techniques to characterise thermofluid phenomena. In his previous positions, he contributed to the development of state-of-the art thermofluids laboratories both at the University of Limerick, Ireland and the Nokia Research Center. Dr. Rodgers is a member of the EuroSIME, SEMI-THERM and THERMINIC conference programme committees, and has been an invited lecturer, keynote speaker, and panelist to discussions on simulation issues in electronics thermal management at international conferences. He has authored or co-authored over thirty refereed conference and journal publications. He is currently supervising doctoral research on the application of CFD analysis to electronics thermal design, undertaken at Electronics Thermal Management.
Title: Coupled-field Predictive Simulation for Virtual Test and Characterization of Microsystems
Duration: half-day (3 – 3.5 hours)
Instructor: Gerhard K.M. Wachutka
Summary: About the instructor:
Gerhard K.M. Wachutka (M'90) received the D.Sc. degree from the Ludwig-Macimilians-Universität, Munich, Germany, in 1985. From 1985 to 1988, he was with Siemens Corporate Research and Development, Munich, where he headed a modelling group active in the development of moderh high-power semiconductor devices. In 1989, he joined the Fritz-Haber-Institue of the Max-Planck Society, Berlin, Germany, where he worked in the field of theoretical solid state physics. From 1990 to 1994, he was head of the microtransducer modelling and characterization group of the Physical Electronics Laboratory at the Swiss Federal Institute of Technology, Zurich. There, he also directed the microtransudecers modelling module of the Swiss Federal Priority Program M2S2 (MicroMechanics on Silicon in Switzerland). Since 1994, he has been heading the Institute for Physics of Electrotechnology, Munich University of Technology, where his research activities are focused on the design, modelling, characterization and diagnosis of the fabrication and operation of semiconductor microdevices and Microsystems. He has authored and coauthored more than 180 publications in scientific or technical journals. He is a consultant to research institutes in industry and universities. He is a reviewer fro various scientivic journals and other institutions. Among his many educational activities, he has set up and taught courses funded by European Community training programmes such as UETP, EUROFORM and EUROPRACTICE.
Prof. Wachutka is a member of the American Electrochemical Society, the American Materials Research Society, the ESD Association, the German Physical Society and AMA Societry for Sensorics.
Title: Advanced Packaging
Duration: half-day (3 – 3.5 hours)
Instructor: Professor H.Anthony Chan
Summary:
Course description
The world has been changing faster than ever before in the use of computers, communications and emerging technologies. There has been continuous push of the products for higher performance, higher speed, smaller size, mobile, more ruggedness, more user-friendly, faster to market, and yet lower cost. As the technologies for chip, photoelectronics, photonics, and micrsystems are changing fast while encountering these challenges, the technologies of packaging and system integration must also change fast and face these challenges.
The technologies for device packaging and systems integration have been changing rapidly in recent years. The areas are diverse and the required skills are highly interdisciplinary. In terms of packaging products, advanced packaging include microelectronic packaging, optoelectronic packaging, Radio frequencies packaging, and bioelectronics packaging. In terms of packaging technologies, packaging may be at chip scale level, component level, board level, and systems level integration. In terms of size, systems are migrating through microsystems technologies to nanotechnologies. In terms of evolution, systems move from conventional systems, through system on package (SOP), system in package (SIP) and Wafer Level Packaging (WLP), and then to system on chip (SOC). In terms of fundamental science and engineering, they include electrical aspects especially that of radio frequencies (rf), mechanical aspects, thermal aspects, materials science, optoelectronics, photonics, reliability, environmental science, and biotechnology.
This short course covers the fundamentals of the different packaging technologies.
Course outline
About the instructor:
H. Anthony Chan received PhD from University of Maryland in 1982 and then continued research there in areas of experimental superconductivity and gravitation. He joined the former AT&T Bell Labs in 1986. Since then, his work had spread over different areas of interconnection, electronic packaging, reliability, and assembly in manufacturing, telecommunication network, datanetwork architecture and wireless. He was the AT&T delegate in several standards work groups under 3rd generation partnership program (3GPP) in 1999. In 2001, He moved back to the academia at San Jose State University as the Pinson (Endowed) Chair Professor. Tony is Administrative Vice President of IEEE CPMT Society. He is distinguished speaker of IEEE CPMT Society and is in the speaker list of IEEE Reliability Society since 1997. Tony has co-authored/co-edited a book with IEEE Press/Addison Wesley and a Video tutorial with IEEE Press.
About the co-author:
Dr. Guna Selvaduray is Professor in Materials Engineering at San Jose State University, where he teaches a variety of undergraduate and graduate courses including biomaterials, engineering ceramics, microelectronic packaging, thermodynamics of solids, experimental methods in materials engineering, materials processing methods, corrosion and design for the environment. He initiated the Microelectronic Packaging concentration area within the MSE Program in 1991. Prior to joining the university, he worked in industry for 10 years. His research areas include microelectronic device interconnects and packaging, Pb-free solders, corrosion, surfaces and surface-related phenomena, recyclability of industrial materials.
Dr. Selvaduray has been the recipient of the Japanese Government (Mombusho) Scholarship (1964-1969) and the Fullbright-Hayes Fellowship (1974-1976). In 1997 he was awarded the SJSU College of Engineering's Excellence in Scholarship Award, and The California Emergency Services Association's Gold Award.
Course 2: Introduction to IC process reliability
Course 3: Recent Challenges for Experimental and Theoretical Reliability Assessment: Fatigue of Lead-free Solder Joints,
Fracture and Interface Fracture in Packaging Applications
Course 4: Experimental Characterisation of Electronic Components and System Thermal Performance
Course 5: Coupled-field Predictive Simulation for Virtual Test and Characterization of Microsystems
Course 6: Advanced Packaging