ESSCIRC ´97
23rd European Solid-State Circuits Conference
Southampton, UK, 16 - 18 September 1997
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
A
(Return to Index)
Abrial A.
,
France Telecom
A 3.3 V 350 MHz 0.35 µm CMOS Programmable RIF Based on Redundant Coding in a Bit Plane Architecture
Alemanni C.
,
SGS-Thomson Microelectronics, Catania, Italy
<"14.pdf">
A Generic CAD Model for Arbitrarily Shaped and Multi-Layer Integrated Inductors on Silicon Substrates
Amano T.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
André Ph.
,
France Telecom
<"107.pdf">
Multilevel Decoder-Decision Circuit for High Bitrate ETDM Transmission
Arimoto K.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Asai S.
,
NEC Corporation, Ibaraki, Japan
A Low-Power, High-Speed 0.25 µm GaAs D-FF
Atkinson S.
,
Mosaic Microsystems Ltd., Kent, United Kingdom
<"23.pdf">
An ISM band Transceiver Chip for Digital Spread Spectrum Communication
Azeredo-Leme C.
,
Instituto Superior Técnico
Low-Power Offset-Calibrated CMOS I/Q Transmit Interface for Portable Communications
B
(Return to Index)
Bakker A.
,
Delft University of Technology
<"73.pdf">
A CMOS Chopper Opamp with Integrated Low-Pass Filter
Balestro F.
,
France Telecom
A 3.3 V 350 MHz 0.35 µm CMOS Programmable RIF Based on Redundant Coding in a Bit Plane Architecture
Bantas S.
,
National Technical Univ. of Athens
<"14.pdf">
A Generic CAD Model for Arbitrarily Shaped and Multi-Layer Integrated Inductors on Silicon Substrates
Bartek M.
,
Delft University of Technology
<"70.pdf">
A Low-Power Low-Voltage Digital Bus Interface for MCM-Based Microsystems
Baschirotto A.
,
Università di Pavia
<"126.pdf">
A 1V CMOS fully-differential switched-opamp bandpass simga-delta modulator
Begueret J.B.
,
Université Bordeaux
1-V Low-Noise 200 MHz Relaxation Oscillator
Belin P.
,
Philips Semiconductors
<"164.pdf">
R, G, B acquisition interface with line locked clock generator, for LCD driver
Belot D.
,
SGS-Thomson
A 3.3V Power Adaptive 1244 / 622 / 155 Mb/s TRANSCEIVER for ATM, SONET/SDH
Berg Y.
,
University of Oslo
<"133.pdf">
Performance enhancement in stochastic pulse code systems using parallelism and redundancy
Bernal A.
,
TIMA Laboratory
<"106.pdf">
New Two Single-Port GaAs Memory Cell
Blair G.M.
,
The University of Edinburgh
<"18.pdf">
Reduced complexity two-phase micropipeline latch controller
Blake J.
,
Analog Devices Newbury Design Centre
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Blaud P.
,
Deutsche Thomson-Brandt GmbH
<"142.pdf">
A Direct Conversion IC for Digital Satellite TV
Borgatti M.
,
University of Bologna
<"69.pdf">
A 0.9V, 30µW Feature Extractor for Remote Speech Recognition
Bouras I.
,
NCSR "Demokritos"
<"127.pdf">
A novel driver architecture capable of driving high capacitive loads for sub-half-micron technologies
Bracmard G.
,
ATMEL/ES2, Rousset, France
Low-Power Offset-Calibrated CMOS I/Q Transmit Interface for Portable Communications
Bradley A.T.
,
Auburn University
<"171.pdf">
FET Mobility Degradation and Device Mismatch due to Packaging Induced Die Stress
Bramwell S.
,
Philips Semiconductors, Nijmegen, Netherlands
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
Brett S.
,
Mosaic Microsystems Ltd., Kent, United Kingdom
<"23.pdf">
An ISM band Transceiver Chip for Digital Spread Spectrum Communication
Brewer B.
,
Analog Devices Newbury Design Centre
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Brianti F.
,
SGS-Thomson Microelectronics, San Jose, United States
<"103.pdf">
Low-Power 200 Msps, Area Efficient, 5-Tap Programmable FIR Filter
Brockherde W.
,
Fraunhofer-Institute, Duisburg, Germany
<"11.pdf">
CMOS Photosensor Arrays with On-Chip Signal Processing
Buchwald A.
,
Broadcom Corporation, Irvine, United States
<"118.pdf">
10-MHz 60-dB Dynamic-Range 4th-Order Butterworth Lowpass Filter
Bult K.
,
Broadcom Corporation, Irvine, United States
<"118.pdf">
10-MHz 60-dB Dynamic-Range 4th-Order Butterworth Lowpass Filter
Bunyan R.J.T.
,
DERA, Malvern, United Kingdom
<"158.pdf">
Drain Current Mismatch in SOI CMOS Current Mirrors and D/A Converters due to Localised Internal and Coupled Heating
C
(Return to Index)
Carbou P.
,
Texas Instruments France
<"173.pdf">
A 1mW only Wireless Phone Voiceband D to A CODEC
Casier H.
,
Alcatel Mietec
<"175.pdf">
A 3.3 Volt, low distortion ISDN line driver with a novel quiescent current control circuit
Castello R.
,
Università di Pavia
A Low-Voltage CMOS Downconversion Mixer for RF Applications
<"126.pdf">
A 1V CMOS fully-differential switched-opamp bandpass simga-delta modulator
Cathelin P.
,
Mixed Silicon Structures
<"147.pdf">
A Fully-Integrated CMOS AM Radio Receiver for Wrist-watch Calibration
Chai K.S.
,
UMIST
A Current-Mode ASIC for Use with Position Sensitive Detector Arrays
Chan Ph.C.H.
,
Hong Kong Univ. of Science & Techn.
<"153.pdf">
A Resistance Variation Tolerant Constant Power Heating Circuit for Integrated Sensor Applications
Chan S.S.W.
,
Hong Kong Univ. of Science & Techn.
<"153.pdf">
A Resistance Variation Tolerant Constant Power Heating Circuit for Integrated Sensor Applications
Cheung P.Y.K.
,
Imperial College of Science, Techn. & Med., London, UK
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Cheung D.
,
Hong Kong Univ. of Science & Technology
<"118.pdf">
10-MHz 60-dB Dynamic-Range 4th-Order Butterworth Lowpass Filter
Choe S.Y.
,
The University of New South Wales
<"94.pdf">
A 1V Bootstrapped CMOS Digital Logic Family
Choi Y.-S.
,
Kangwon National University, Korea (South)
<"77.pdf">
A Low Noise Folded Bit-Line Sensing Architecture for Multi-Gb DRAM with Ultra High Density 6F² Cell
Cioffi J.M.
,
Information Systems Laboratory
<"301.pdf">
Very high-speed Digital Subscriber Lines (VDSL)
Claudius D.
,
University of Bucharest, Romania
<"9.pdf">
A Fully-Integrated FM Discriminator for RDS Applications
Conta M.
,
Rockwell International, Newport Beach, United States
A Low-Voltage CMOS Downconversion Mixer for RF Applications
Copeland M.A.
,
Carleton University
<"56.pdf">
A lower ISM band frequency synthesizer and GMSK data modulator
Correia J.H.
,
Delft University of Technology
<"70.pdf">
A Low-Power Low-Voltage Digital Bus Interface for MCM-Based Microsystems
Crespin S.
,
Philips Composants et Semiconduct.
<"36.pdf">
Read front end of a new AC coupled Preamplifier for 300 Mb/s Hard Disk Drives using single stripe Magneto Resistive heads
Cretu E.
,
Delft University of Technology
<"70.pdf">
A Low-Power Low-Voltage Digital Bus Interface for MCM-Based Microsystems
D
(Return to Index)
de la Rosa J.M.
,
Inst. de Microelectrónica Sevilla
<"121.pdf">
A 2.5MHz 55dB Switched-Current Bandpass sigma-delta Modulator for AM Signal Conversion
De Smedt B.
,
Katholieke Universiteit Leuven
<"100.pdf">
Accurate Simulation of Phase Noise in Oscillators
Dedic I.J.
,
Fujitsu Microelectronics Ltd.
<"63.pdf">
A 16 bit 500ks/s 2.7V 5mW ADC/DAC in 0.8um CMOS using error-correcting successive approximation
Dedieu S.
,
SGS-Thomson
A 3.3V Power Adaptive 1244 / 622 / 155 Mb/s TRANSCEIVER for ATM, SONET/SDH
Della Torre V.
,
Rockwell International, Newport Beach, United States
A Low-Voltage CMOS Downconversion Mixer for RF Applications
den Besten G.W.
,
Philips Research Laboratories
<"76.pdf">
Embedded 5V-to-3.3V Voltage Regulator for Supplying Digital IC´s in 3.3V CMOS Technology
Desel Th.
,
Fraunhofer-Institute
A 5-bit 150 MS/s, 3.3 V CMOS A/D Converter with a 32 Step Adjustable Reference Circuit
Desrousseaux P.
,
France Telecom
<"107.pdf">
Multilevel Decoder-Decision Circuit for High Bitrate ETDM Transmission
Deval Y.
,
Université Bordeaux
1-V Low-Noise 200 MHz Relaxation Oscillator
Dijkmans E.C.
,
Philips Research Laboratories
<"75.pdf">
A -90 dB THD Rail-to-Rail input opamp using a new local charge pump in CMOS
<"304.pdf">
Hearing aids go digital
Ding T.J.
,
The Queen's University of Belfast
<"102.pdf">
Rapid design of complex DSP cores
Dom J.P.
,
Université Bordeaux
1-V Low-Noise 200 MHz Relaxation Oscillator
Drischel T.
,
Fraunhofer-Institute
<"96.pdf">
Integrated RF transmitter based on SAW Oscillator
Duffee R.
,
Philips Semiconductors, Southhampton, United Kingdom
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
Dugoujon L.
,
SGS-Thomson
A 3.3V Power Adaptive 1244 / 622 / 155 Mb/s TRANSCEIVER for ATM, SONET/SDH
Duisters A.F.
,
Philips Research Laboratories
<"75.pdf">
A -90 dB THD Rail-to-Rail input opamp using a new local charge pump in CMOS
Dupuy C.
,
ATMEL/ES2, Rousset, France
Low-Power Offset-Calibrated CMOS I/Q Transmit Interface for Portable Communications
E
(Return to Index)
Edwards C.F.
,
University of Southampton
<"158.pdf">
Drain Current Mismatch in SOI CMOS Current Mirrors and D/A Converters due to Localised Internal and Coupled Heating
Ehlert M.
,
Technical University of Berlin
<"27.pdf">
A 12bit Medium-Time Analog Storage Device in a CMOS Standard-Process
Eklund J.-E.
,
Linköping University
<"60.pdf">
A 200 MHz cell for a Parallel-Successive-Approximation ADC in 0.8 µm CMOS, using a Reference Pre-Select scheme
Enomoto T.
,
Chuo University
A Low-Power, High-Speed 0.25 µm GaAs D-FF
Enz C.C.
,
Swiss Federal Inst. of Technology
<"176.pdf">
A Low-Voltage Power and Area Efficient BiCMOS Log-Domain Filter
F
(Return to Index)
Felici M.
,
University of Bologna
<"69.pdf">
A 0.9V, 30µW Feature Extractor for Remote Speech Recognition
Ferrari A.
,
University of Bologna
<"69.pdf">
A 0.9V, 30µW Feature Extractor for Remote Speech Recognition
Fiebig N.
,
Deutsche Thomson-Brandt GmbH
<"142.pdf">
A Direct Conversion IC for Digital Satellite TV
Filiol N.M.
,
Carleton University
<"56.pdf">
A lower ISM band frequency synthesizer and GMSK data modulator
Forrest J.
,
Brewton Group
Digital Televison - A Quick Circuit of Next Grand Prix for Semiconductor Industry
Foss R.C.
,
MOSAID Technology Inc.
<"305.pdf">
Taking DRAM from 4MBytes/sec to 4 GBytes/sec
Franca J.
,
Instituto Superior Técnico
Low-Power Offset-Calibrated CMOS I/Q Transmit Interface for Portable Communications
Fransis B.
,
Rockwell Semiconductor Systems, San Diego, United States
<"95.pdf">
A 0.9V 960MHz CMOS Radio Front End Employing a Doubly Balanced Transconductance Mixer
Fujii M.
,
NEC Corporation, Ibaraki, Japan
A Low-Power, High-Speed 0.25 µm GaAs D-FF
Fujino T.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
G
(Return to Index)
Gegout A.
,
CCETT, Sesson Sevigne, France
A 3.3 V 350 MHz 0.35 µm CMOS Programmable RIF Based on Redundant Coding in a Bit Plane Architecture
Gielen G.
,
Katholieke Universiteit Leuven
<"100.pdf">
Accurate Simulation of Phase Noise in Oscillators
Gilbert B.
,
Analog Devices Inc.
Advances in BJT Techniques for High-Performance Transceivers
Godin J.
,
France Telecom
<"107.pdf">
Multilevel Decoder-Decision Circuit for High Bitrate ETDM Transmission
Goes J.
,
Instituto Superior Técnico
Low-Power Offset-Calibrated CMOS I/Q Transmit Interface for Portable Communications
Gräfe M.
,
Universität Dortmund
<"12.pdf">
A Wide Range dB-linear Variable Gain CMOS Amplifier
Graindourze B.
,
Alcatel Mietec
<"175.pdf">
A 3.3 Volt, low distortion ISDN line driver with a novel quiescent current control circuit
Granger-Jones M.
,
GEC Plessey Semiconductors Inc.
<"23.pdf">
An ISM band Transceiver Chip for Digital Spread Spectrum Communication
Grisenthwaite R.
,
Analog Devices Newbury Design Centre
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Groeseneken G.
,
IMEC
<"120.pdf">
Novel Level-Identifying Circuit for Flash Multi-Level Memories
Grünebaum U.
,
Universität Dortmund
<"119.pdf">
Mismatch Modelling for Large Area MOS Devices
Guerrieri R.
,
University of Bologna
<"69.pdf">
A 0.9V, 30µW Feature Extractor for Remote Speech Recognition
Guignon P.
,
Texas Instruments France
<"173.pdf">
A 1mW only Wireless Phone Voiceband D to A CODEC
Guyot A.
,
TIMA Laboratory
<"106.pdf">
New Two Single-Port GaAs Memory Cell
H
(Return to Index)
Haas M.
,
Siemens Entwicklungszentrum, Villach, Austria
A 5-bit 150 MS/s, 3.3 V CMOS A/D Converter with a 32 Step Adjustable Reference Circuit
Hadidi Kh.
,
Urmia University
A 103MHz Open-Loop Full CMOS Highly -Linear Sample-and-Hold Amplifier
Halonen K.
,
Helsinki University of Technology
<"71.pdf">
A Direct Digital Synthesizer with an On-chip D/A-converter
Hamano H.
,
Mitsubishi Electric Corporation
<"149.pdf">
A High Speed SRAM macro for 0.35 µm Low Voltage SOI/CMOS Gate Arrays
Hammerschmidt D.
,
Fraunhofer-Institute
<"169.pdf">
Single Bit Sigma-Delta Modulator with Nonlinear Quantization for µ-Law Coding
Hansen F.
,
University of Toronto
<"57.pdf">
2.5 Gb/s ATM Physical Layer Controller in 0.8 µm BiCMOS
Hatfield J.V.
,
UMIST
A Current-Mode ASIC for Use with Position Sensitive Detector Arrays
A High Resolution Electron Imaging Integrated Circuit
Hauschild R.
,
Fraunhofer-Institute, Duisburg, Germany
<"11.pdf">
CMOS Photosensor Arrays with On-Chip Signal Processing
Heuberger A.
,
Fraunhofer-Institute
<"96.pdf">
Integrated RF transmitter based on SAW Oscillator
Hilbert A.
,
MAZET, Jena, Germany
<"35.pdf">
A 5V CMOS Chip for Interpolation of Sine/Cosine Signals
Hirobe A.
,
Chuo University
A Low-Power, High-Speed 0.25 µm GaAs D-FF
Hitchcox D.
,
Analog Devices Newbury Design Centre
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Hode J.-M.
,
Thomson Microsonics
Passive filtres
Hossack D.
,
Wolfson Microelectronics Ltd.
<"68.pdf">
Robust CMOS Compander
Hosticka B.J.
,
Fraunhofer-Institute, Duisburg, Germany
<"11.pdf">
CMOS Photosensor Arrays with On-Chip Signal Processing
Hosticka B.J.
,
Fraunhofer-Institute
<"169.pdf">
Single Bit Sigma-Delta Modulator with Nonlinear Quantization for µ-Law Coding
Hu Y.
,
Integrated Silicon Systems Ltd., Belfast, United Kindom
<"102.pdf">
Rapid design of complex DSP cores
Huang Q.
,
ETH Zurich
<"134.pdf">
An IF-Strip with Integrated 2nd IF Filter for a Triple Conversion GPS Receiver
Huang Q.
,
Swiss Federal Inst. of Technology
<"139.pdf">
A 0.5mW Passive Telemetry IC for Biomedical Applications
<"167.pdf">
The Impact of Scaling Down to Deep-Submicron on CMOS RF Circuits
Huertas J.L.
,
University of Sevilla
<"114.pdf">
A High-Q Bandpass Fully Differential SC Filter with Enhanced Testability
Huijsing J.H.
,
Delft University of Technology
<"73.pdf">
A CMOS Chopper Opamp with Integrated Low-Pass Filter
Hülsmann A.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
I
(Return to Index)
Iida T.
,
Toshiba Corporation, Kawasaki, Japan
A Low-Voltage, High-Speed and Low-Power Full Current-Mode Video-rate CMOS A/D Converter
Ipek M.
,
Deutsche Thomson-Brandt GmbH
<"142.pdf">
A Direct Conversion IC for Digital Satellite TV
Iwade S.
,
Mitsubishi Electric Corporation
<"149.pdf">
A High Speed SRAM macro for 0.35 µm Low Voltage SOI/CMOS Gate Arrays
Iwata H.
,
Chuo University
A Low-Power, High-Speed 0.25 µm GaAs D-FF
J
(Return to Index)
Jaeger R.C.
,
Auburn University
<"171.pdf">
FET Mobility Degradation and Device Mismatch due to Packaging Induced Die Stress
Jakobus T.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Jalali B.
,
Univ. of California
<"53.pdf">
1.25 Gb/s CMOS Differential Transimpedance Amplifier for Gigabit Networks
James S.
,
Philips Semiconductors, Southampton, United Kingdom
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
K
(Return to Index)
Kalkhof B.W.
,
Robert Bosch GmbH
Microlectronics in Automotive Applications, Technical and Economic Impact
Kanno H.
,
NEC Corporation
Novel High-Speed and Low-Power Dynamic MOS Flip-Flops for a Low-Power 1.25GHz Multiplexer/Demultiplexer
Kasperkovitz D.
,
Philips Research Laboratories
<"51.pdf">
A wide band Tuning System for Fully Integrated Satellite Receivers
Kato H.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Katsafouros S.G.
,
NCSR "Demokritos"
<"127.pdf">
A novel driver architecture capable of driving high capacitive loads for sub-half-micron technologies
Kemp A.K.
,
Fujitsu Microelectronics Ltd.
<"63.pdf">
A 16 bit 500ks/s 2.7V 5mW ADC/DAC in 0.8um CMOS using error-correcting successive approximation
Ki H.-J.
,
Korea University
<"124.pdf">
A High Speed, Low Power 8-Tap Digital FIR Filter for PRML Disk-Drive Read Channels
Kim J.-S.
,
Seoul National University
<"77.pdf">
A Low Noise Folded Bit-Line Sensing Architecture for Multi-Gb DRAM with Ultra High Density 6F² Cell
Kim S.-W.
,
Korea University
<"124.pdf">
A High Speed, Low Power 8-Tap Digital FIR Filter for PRML Disk-Drive Read Channels
Klar H.
,
Technical University of Berlin
<"27.pdf">
A 12bit Medium-Time Analog Storage Device in a CMOS Standard-Process
Klosa K.U.
,
Siemens Semiconductors
Contactless chipcards - trends and techniques
Kobayashi M.
,
Daioh Electric Corp., Itami, Japan
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Konczykowska A.
,
France Telecom
<"107.pdf">
Multilevel Decoder-Decision Circuit for High Bitrate ETDM Transmission
Kostamovaara J.
,
University of Oulu
<"46.pdf">
A 9-channel Time-to-Digital Converter for an Imaging Lidar Application
<"47.pdf">
A 3-V delay-modulated PLL synthesizer for analog FM transmitters
<"48.pdf">
A High Resolution Time-to-Digital Converter Based on Time-to-Voltage Interpolation
<"93.pdf">
A Variable Gain Transimpedance Amplifier Channel with a Timing Discriminator for a Time-of-Flight Laser Radar
Kosunen M.
,
Helsinki University of Technology
<"71.pdf">
A Direct Digital Synthesizer with an On-chip D/A-converter
Koutsoyannopoulos Y.
,
National Technical Univ. of Athens
<"14.pdf">
A Generic CAD Model for Arbitrarily Shaped and Multi-Layer Integrated Inductors on Silicon Substrates
Krasnanski N.
,
Info Réalité, Vendenheim, France
<"147.pdf">
A Fully-Integrated CMOS AM Radio Receiver for Wrist-watch Calibration
Krauss M.
,
Zentrum Mikroelektronik Dresden GmbH
<"35.pdf">
A 5V CMOS Chip for Interpolation of Sine/Cosine Signals
Kropf C.
,
Siemens Entwicklungszentrum, Villach, Austria
A 5-bit 150 MS/s, 3.3 V CMOS A/D Converter with a 32 Step Adjustable Reference Circuit
Ku W.
,
Univ. of California at San Diego, United States
<"95.pdf">
A 0.9V 960MHz CMOS Radio Front End Employing a Doubly Balanced Transconductance Mixer
Kuttner F.
,
Siemens Entwicklungszentrum, Villach, Austria
A 5-bit 150 MS/s, 3.3 V CMOS A/D Converter with a 32 Step Adjustable Reference Circuit
L
(Return to Index)
Laiho M.
,
Tampere University of Technology
<"172.pdf">
A Full-Custom Self-Timed DSP Processor Implementation
Lande T.S.
,
University of Oslo
<"130.pdf">
Building Blocks for Low-Power Stochastic Pulse Coded Systems
<"133.pdf">
Performance enhancement in stochastic pulse code systems using parallelism and redundancy
Lapuyade H.
,
Université Bordeaux
1-V Low-Noise 200 MHz Relaxation Oscillator
Lares R.
,
University of Ulm
<"72.pdf">
CMOS circuit technique for serial IC interconnection up to 1.1 Gb/s
Leclerc P.
,
Philips Composants et Semiconduct.
<"36.pdf">
Read front end of a new AC coupled Preamplifier for 300 Mb/s Hard Disk Drives using single stripe Magneto Resistive heads
Lee M.S.
,
University of Southampton
<"158.pdf">
Drain Current Mismatch in SOI CMOS Current Mirrors and D/A Converters due to Localised Internal and Coupled Heating
Leuschner U.
,
Zentrum Mikroelektronik Dresden GmbH
<"35.pdf">
A 5V CMOS Chip for Interpolation of Sine/Cosine Signals
Leuthold O.
,
GEC Plessey Semiconductors
<"20.pdf">
200 Megasample per second 6 bit A/D converter
Lomas D.G.
,
UMIST
A High Resolution Electron Imaging Integrated Circuit
M
(Return to Index)
Machul O.
,
Fraunhofer-Institute
<"169.pdf">
Single Bit Sigma-Delta Modulator with Nonlinear Quantization for µ-Law Coding
Maes H.E
,
IMEC
<"120.pdf">
Novel Level-Identifying Circuit for Flash Multi-Level Memories
Mäntyniemi A.
,
University of Oulu
<"46.pdf">
A 9-channel Time-to-Digital Converter for an Imaging Lidar Application
Marie H.
,
Philips Semiconductors
<"164.pdf">
R, G, B acquisition interface with line locked clock generator, for LCD driver
Marques A.
,
Katholieke Universiteit Leuven
<"116.pdf">
A 15-bit 2MHz Nyquist Rate delta-sigma ADC in a 1 µm CMOS Technology
Mateo D.
,
Univ. Politècnica de Catalunya
<"135.pdf">
Implementation of a 5x5 trits multiplier in a Quasi-Adiabatic Ternary CMOS Logic
Matsumoto T.
,
Waseda University, Tokyo, Japan
A 103MHz Open-Loop Full CMOS Highly -Linear Sample-and-Hold Amplifier
Mattausch H.J.
,
Hiroshima University
<"31.pdf">
Hierarchical N-Port Memory Architecture based on 1-Port Memory Cells
McCanny J.V.
,
The Queen's University of Belfast
<"102.pdf">
Rapid design of complex DSP cores
Medeiro F.
,
Inst. de Microelectrónica Sevilla
<"121.pdf">
A 2.5MHz 55dB Switched-Current Bandpass sigma-delta Modulator for AM Signal Conversion
<"150.pdf">
A 74dB Dynamic Range, 1.1-MHz Signal Band 4th-Order 2-1-1 Cascade Multi-Bit CMOS sigma-delta Modulator for ADSL
Meghelli M.
,
France Telecom
<"107.pdf">
Multilevel Decoder-Decision Circuit for High Bitrate ETDM Transmission
Moeneclaey N.
,
Texas Instruments France
<"173.pdf">
A 1mW only Wireless Phone Voiceband D to A CODEC
Moffat M.
,
GEC Plessey Semiconductors Inc.
<"23.pdf">
An ISM band Transceiver Chip for Digital Spread Spectrum Communication
Moloney D.
,
Silicon Systems Design Ltd.
<"103.pdf">
Low-Power 200 Msps, Area Efficient, 5-Tap Programmable FIR Filter
Montanari D.
,
IMEC
<"120.pdf">
Novel Level-Identifying Circuit for Flash Multi-Level Memories
Moreau J.P.
,
SGS-Thomson, Crolles, France
<"127.pdf">
A novel driver architecture capable of driving high capacitive loads for sub-half-micron technologies
Morishita F.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Moughabghab R.
,
Rockwell Semiconductor Systems
A 1GHz, 40 mW Fully Integrated Continuous-Time Second-Order Bandpass Filter in GaAs Technology
Mulder J.
,
Delft University of Technology
<"2.pdf">
A Wide-Tunable Translinear Second-Order Oscillator
Muramatsu D.
,
Waseda University, Tokyo, Japan
A 103MHz Open-Loop Full CMOS Highly -Linear Sample-and-Hold Amplifier
N
(Return to Index)
Naess S.
,
University of Oslo
<"130.pdf">
Building Blocks for Low-Power Stochastic Pulse Coded Systems
<"133.pdf">
Performance enhancement in stochastic pulse code systems using parallelism and redundancy
Nauta B.
,
Philips Research Laboratories, Eindhoven, Netherlands
<"61.pdf">
Low-power low-voltage chopped transconductance amplifier for noise and offset reduction
Nauta B.
,
Philips Research Laboratories
<"76.pdf">
Embedded 5V-to-3.3V Voltage Regulator for Supplying Digital IC´s in 3.3V CMOS Technology
Nielsen P.A.
,
Technical University of Denmark
<"169.pdf">
Single Bit Sigma-Delta Modulator with Nonlinear Quantization for µ-Law Coding
Nii K.
,
Mitsubishi Electric Corporation
<"149.pdf">
A High Speed SRAM macro for 0.35 µm Low Voltage SOI/CMOS Gate Arrays
Nitescu-Henry A.
,
IEMN
<"9.pdf">
A Fully-Integrated FM Discriminator for RDS Applications
O
(Return to Index)
O'Brien J.
,
Silicon Systems Design Ltd.
<"103.pdf">
Low-Power 200 Msps, Area Efficient, 5-Tap Programmable FIR Filter
O'Rourke E.
,
Silicon Systems Design Ltd.
<"103.pdf">
Low-Power 200 Msps, Area Efficient, 5-Tap Programmable FIR Filter
Oberle M.
,
Swiss Federal Inst. of Technology
<"139.pdf">
A 0.5mW Passive Telemetry IC for Biomedical Applications
Oehm J.
,
Universität Dortmund
<"12.pdf">
A Wide Range dB-linear Variable Gain CMOS Amplifier
<"119.pdf">
Mismatch Modelling for Large Area MOS Devices
Ohguro T.
,
Toshiba Corporation, Tokyo, Japan
<"167.pdf">
The Impact of Scaling Down to Deep-Submicron on CMOS RF Circuits
Op't Eynde F.
,
Mixed Silicon Structures
An EEPROM in a Standard CMOS technology
Op't Eynde F.
,
Mixed Silicon Structures, Roubaix, France
<"9.pdf">
A Fully-Integrated FM Discriminator for RDS Applications
Op't Eynde F.
,
Mixed Silicon Structures
<"147.pdf">
A Fully-Integrated CMOS AM Radio Receiver for Wrist-watch Calibration
Orsatti P.
,
Swiss Federal Inst. of Technology
<"167.pdf">
The Impact of Scaling Down to Deep-Submicron on CMOS RF Circuits
P
(Return to Index)
Paik W.-H.
,
LG Corporate Inst. of Technology
<"124.pdf">
A High Speed, Low Power 8-Tap Digital FIR Filter for PRML Disk-Drive Read Channels
Palmisano G.
,
Università di Catania
A Novel 1.5-V CMOS Operational Amplifier
Palojärvi P.
,
University of Oulu
<"93.pdf">
A Variable Gain Transimpedance Amplifier Channel with a Timing Discriminator for a Time-of-Flight Laser Radar
Palumbo G.
,
Università di Catania
A Novel 1.5-V CMOS Operational Amplifier
Papadas C.
,
NCSR "Demokritos"
<"127.pdf">
A novel driver architecture capable of driving high capacitive loads for sub-half-micron technologies
Papananos Y.
,
National Technical Univ. of Athens
<"14.pdf">
A Generic CAD Model for Arbitrarily Shaped and Multi-Layer Integrated Inductors on Silicon Substrates
Peluso V.
,
Katholieke Universiteit Leuven
<"116.pdf">
A 15-bit 2MHz Nyquist Rate delta-sigma ADC in a 1 µm CMOS Technology
Peralías E.
,
University of Sevilla
<"114.pdf">
A High-Q Bandpass Fully Differential SC Filter with Enhanced Testability
Pérez-Verdú B.
,
Inst. de Microelectrónica Sevilla
<"121.pdf">
A 2.5MHz 55dB Switched-Current Bandpass sigma-delta Modulator for AM Signal Conversion
<"150.pdf">
A 74dB Dynamic Range, 1.1-MHz Signal Band 4th-Order 2-1-1 Cascade Multi-Bit CMOS sigma-delta Modulator for ADSL
Piazza F.
,
ETH Zurich
<"134.pdf">
An IF-Strip with Integrated 2nd IF Filter for a Triple Conversion GPS Receiver
Piazza F.
,
Swiss Federal Inst. of Technology
<"167.pdf">
The Impact of Scaling Down to Deep-Submicron on CMOS RF Circuits
Pieraerts E.
,
Philips Composants et Semiconduct.
<"36.pdf">
Read front end of a new AC coupled Preamplifier for 300 Mb/s Hard Disk Drives using single stripe Magneto Resistive heads
Plett C.
,
Carleton University
<"56.pdf">
A lower ISM band frequency synthesizer and GMSK data modulator
Popescu S.-M.
,
University of Bucharest, Romania
<"9.pdf">
A Fully-Integrated FM Discriminator for RDS Applications
Punch F.
,
Philips Composants et Semiconduct.
<"36.pdf">
Read front end of a new AC coupled Preamplifier for 300 Mb/s Hard Disk Drives using single stripe Magneto Resistive heads
Punzenberger M.
,
Swiss Federal Inst. of Technology
<"176.pdf">
A Low-Voltage Power and Area Efficient BiCMOS Log-Domain Filter
Q
(Return to Index)
Quinn P.J.
,
Philips Semiconductors
<"144.pdf">
High-Accuracy Charge-Redistribution Switched-Capacitor Video Bandpass Filter in Standard 0.8 µm CMOS
R
(Return to Index)
Rahkonen T.
,
University of Oulu
<"46.pdf">
A 9-channel Time-to-Digital Converter for an Imaging Lidar Application
<"47.pdf">
A 3-V delay-modulated PLL synthesizer for analog FM transmitters
<"48.pdf">
A High Resolution Time-to-Digital Converter Based on Time-to-Voltage Interpolation
Rainard J.L.
,
France Telecom
A 3.3 V 350 MHz 0.35 µm CMOS Programmable RIF Based on Redundant Coding in a Bit Plane Architecture
Räisänen-Ruotsalainen E.
,
University of Oulu
<"48.pdf">
A High Resolution Time-to-Digital Converter Based on Time-to-Voltage Interpolation
Raynor B.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Redman-White W.
,
Philips Semiconductors
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
Redman-White W.
,
University of Southampton
<"158.pdf">
Drain Current Mismatch in SOI CMOS Current Mirrors and D/A Converters due to Localised Internal and Coupled Heating
Rieger-Motzer R.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Rigby G.A.
,
The University of New South Wales
<"94.pdf">
A 1V Bootstrapped CMOS Digital Logic Family
Rijns H.
,
Philips Semiconductors, Nijmegen, Netherlands
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
Riley T.A.D.
,
Carleton University
<"56.pdf">
A lower ISM band frequency synthesizer and GMSK data modulator
Risseeuw F.
,
Ericsson Business Mobile Networks
<"1.pdf">
REMBRANDT: A RF ASIC for DECT TDMA applications
Rodes F.
,
IXL-ENSERB
<"92.pdf">
A 1.2µ BiCMOS realization of a low power and offset-free Voltage/Frequency converter
Rodríguez-Vázquez A.
,
Inst. de Microelectrónica Sevilla
<"121.pdf">
A 2.5MHz 55dB Switched-Current Bandpass sigma-delta Modulator for AM Signal Conversion
<"150.pdf">
A 74dB Dynamic Range, 1.1-MHz Signal Band 4th-Order 2-1-1 Cascade Multi-Bit CMOS sigma-delta Modulator for ADSL
Rothermel A.
,
University of Ulm
<"72.pdf">
CMOS circuit technique for serial IC interconnection up to 1.1 Gb/s
Rouleau F.
,
Texas Instruments France
<"173.pdf">
A 1mW only Wireless Phone Voiceband D to A CODEC
Rubito A.
,
Univ. Politècnica de Catalunya
<"135.pdf">
Implementation of a 5x5 trits multiplier in a Quasi-Adiabatic Ternary CMOS Logic
Rueda A.
,
University of Sevilla
<"114.pdf">
A High-Q Bandpass Fully Differential SC Filter with Enhanced Testability
Ruotsalainen T.
,
University of Oulu
<"93.pdf">
A Variable Gain Transimpedance Amplifier Channel with a Timing Discriminator for a Time-of-Flight Laser Radar
S
(Return to Index)
Saito T.
,
NEC Corporation
Novel High-Speed and Low-Power Dynamic MOS Flip-Flops for a Low-Power 1.25GHz Multiplexer/Demultiplexer
Salama C.A.T.
,
University of Toronto
<"57.pdf">
2.5 Gb/s ATM Physical Layer Controller in 0.8 µm BiCMOS
Salerno R.
,
Università di Catania
A Novel 1.5-V CMOS Operational Amplifier
Sallaerts D.
,
Alcatel Mietec
<"175.pdf">
A 3.3 Volt, low distortion ISDN line driver with a novel quiescent current control circuit
Sanduleanu M.A.T.
,
University of Twente
<"61.pdf">
Low-power low-voltage chopped transconductance amplifier for noise and offset reduction
Sansen W.
,
Katholieke Universiteit Leuven
<"116.pdf">
A 15-bit 2MHz Nyquist Rate delta-sigma ADC in a 1 µm CMOS Technology
Sasaki M.
,
Waseda University, Tokyo, Japan
A 103MHz Open-Loop Full CMOS Highly -Linear Sample-and-Hold Amplifier
Sato M.
,
NEC Corporation
Novel High-Speed and Low-Power Dynamic MOS Flip-Flops for a Low-Power 1.25GHz Multiplexer/Demultiplexer
Schanz M.
,
Gerhard-Mercator Univ. of Duisburg
<"11.pdf">
CMOS Photosensor Arrays with On-Chip Signal Processing
Schlechtweg M.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Schneider J.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Schniek H.-G.
,
Zentrum Mikroelektronik Dresden GmbH
<"35.pdf">
A 5V CMOS Chip for Interpolation of Sine/Cosine Signals
Schofield W.G.
,
Fujitsu Microelectronics Ltd.
<"63.pdf">
A 16 bit 500ks/s 2.7V 5mW ADC/DAC in 0.8um CMOS using error-correcting successive approximation
Schumacher K.
,
Universität Dortmund
<"12.pdf">
A Wide Range dB-linear Variable Gain CMOS Amplifier
<"119.pdf">
Mismatch Modelling for Large Area MOS Devices
Schweer R.
,
THOMSON multimedia, Villingen-Schwenningen, Germany
<"72.pdf">
CMOS circuit technique for serial IC interconnection up to 1.1 Gb/s
Seo K.-S.
,
Seoul National University
<"77.pdf">
A Low Noise Folded Bit-Line Sensing Architecture for Multi-Gb DRAM with Ultra High Density 6F² Cell
Serdijn W. A.
,
Delft University of Technology
<"2.pdf">
A Wide-Tunable Translinear Second-Order Oscillator
Shepherd P.
,
Analog Devices Newbury Design Centre
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Spanoche S.-A.
,
University of Bucharest, Romania
<"9.pdf">
A Fully-Integrated FM Discriminator for RDS Applications
Steyaert M.
,
Katholieke Universiteit Leuven
<"116.pdf">
A 15-bit 2MHz Nyquist Rate delta-sigma ADC in a 1 µm CMOS Technology
Stroet P.M.
,
University of Twente
<"62.pdf">
Realization of a 10 MHz integrated bipolar DECT band-pass filter
Sugimoto Y.
,
Chuo University
A Low-Voltage, High-Speed and Low-Power Full Current-Mode Video-rate CMOS A/D Converter
Suhling J.C.
,
Auburn University
<"171.pdf">
FET Mobility Degradation and Device Mismatch due to Packaging Induced Die Stress
Sullivan P.J.
,
Univ. of California at San Diego, United States
<"95.pdf">
A 0.9V 960MHz CMOS Radio Front End Employing a Doubly Balanced Transconductance Mixer
Svelto F.
,
Università di Pavia
A Low-Voltage CMOS Downconversion Mixer for RF Applications
T
(Return to Index)
Tammelin S.
,
Nokia Mobile Phones, Oulu, Finland
<"47.pdf">
A 3-V delay-modulated PLL synthesizer for analog FM transmitters
Tanizaki T.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Taylor G.S.
,
The University of Edinburgh
<"18.pdf">
Reduced complexity two-phase micropipeline latch controller
Tenbroek B.
,
University of Southampton
<"158.pdf">
Drain Current Mismatch in SOI CMOS Current Mirrors and D/A Converters due to Localised Internal and Coupled Heating
Teuner A.
,
Fraunhofer-Institute, Duisburg, Germany
<"11.pdf">
CMOS Photosensor Arrays with On-Chip Signal Processing
Thiede A.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Thomas C.
,
CCETT, Sesson Sevigne, France
A 3.3 V 350 MHz 0.35 µm CMOS Programmable RIF Based on Redundant Coding in a Bit Plane Architecture
Thorel P.
,
France Telecom
A 3.3 V 350 MHz 0.35 µm CMOS Programmable RIF Based on Redundant Coding in a Bit Plane Architecture
Tijou J.
,
Philips Semiconductors, Southampton, United Kingdom
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
Tomas J.
,
Université Bordeaux
1-V Low-Noise 200 MHz Relaxation Oscillator
Trainor D.
,
Integrated Silicon Systems Ltd., Belfast, United Kindom
<"102.pdf">
Rapid design of complex DSP cores
Tsuchihashi K.
,
Mitsubishi Electric Corporation
<"149.pdf">
A High Speed SRAM macro for 0.35 µm Low Voltage SOI/CMOS Gate Arrays
Tsukude M.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Tsuruda T.
,
Mitsubishi Electric Corporation
<"170.pdf">
Practical Low Power Design Architecture for 256 Mb DRAM
Tuthill M.
,
Analog Devices
<"49.pdf">
A Switched Current, Switched Capacitor Temperature Sensor in 0.6u CMOS
U
(Return to Index)
Ueda K.
,
Mitsubishi Electric Corporation
<"149.pdf">
A High Speed SRAM macro for 0.35 µm Low Voltage SOI/CMOS Gate Arrays
Uren M.J.
,
DERA, Malvern, United Kingdom
<"158.pdf">
Drain Current Mismatch in SOI CMOS Current Mirrors and D/A Converters due to Localised Internal and Coupled Heating
V
(Return to Index)
V. Scotti M.
,
Imperial College of Science, Techn. & Med., London, UK
<"29.pdf">
High Speed Arithmetic Design Using CPL and DPL Logic
Vainio O.
,
Tampere University of Technology
<"172.pdf">
A Full-Custom Self-Timed DSP Processor Implementation
van der Weide G.
,
Philips Research, Eindhoven, Netherlands
<"117.pdf">
A Robust Analogue Interface System for Sub-Micron CMOS Video DSP
Van der Woerd A.C.
,
Delft University of Technology
<"2.pdf">
A Wide-Tunable Translinear Second-Order Oscillator
Van Erven N.
,
Ericsson Business Mobile Networks
<"1.pdf">
REMBRANDT: A RF ASIC for DECT TDMA applications
Van Houdt J.
,
IMEC
<"120.pdf">
Novel Level-Identifying Circuit for Flash Multi-Level Memories
Van Roermund A.H.M.
,
Delft University of Technology
<"2.pdf">
A Wide-Tunable Translinear Second-Order Oscillator
Van Roosmalen M.
,
Ericsson Business Mobile Networks
<"1.pdf">
REMBRANDT: A RF ASIC for DECT TDMA applications
van Zeijl P.T.M.
,
Ericsson Business Mobile Networks
<"1.pdf">
REMBRANDT: A RF ASIC for DECT TDMA applications
Van Zeijl P.T.M.
,
Ericsson Mobile Networks B.V., Enschede, Netherlands
<"62.pdf">
Realization of a 10 MHz integrated bipolar DECT band-pass filter
Vankka J.
,
Helsinki University of Technology
<"71.pdf">
A Direct Digital Synthesizer with an On-chip D/A-converter
Vaucher C.S.
,
Philips Research Laboratories
<"51.pdf">
A wide band Tuning System for Fully Integrated Satellite Receivers
Vázquez D.
,
University of Sevilla
<"114.pdf">
A High-Q Bandpass Fully Differential SC Filter with Enhanced Testability
Vital J.
,
Instituto Superior Técnico
Low-Power Offset-Calibrated CMOS I/Q Transmit Interface for Portable Communications
W
(Return to Index)
Wada Y.
,
Mitsubishi Electric Corporation
<"149.pdf">
A High Speed SRAM macro for 0.35 µm Low Voltage SOI/CMOS Gate Arrays
Wallinga H.
,
University of Twente
<"61.pdf">
Low-power low-voltage chopped transconductance amplifier for noise and offset reduction
Waltari M.
,
Helsinki University of Technology
<"71.pdf">
A Direct Digital Synthesizer with an On-chip D/A-converter
Wang Z.-G.
,
Fraunhofer-Institute
<"82.pdf">
10 Gb/s Single-Chip Data Regeneration with an Injection Synchronised Ring Oscillator and an Automatic Phase Adjustment
Wassenaar R.F.
,
University of Twente
<"62.pdf">
Realization of a 10 MHz integrated bipolar DECT band-pass filter
Watanabe T.
,
Waseda University, Tokyo, Japan
A 103MHz Open-Loop Full CMOS Highly -Linear Sample-and-Hold Amplifier
Weiler D.
,
Fraunhofer-Institute
<"169.pdf">
Single Bit Sigma-Delta Modulator with Nonlinear Quantization for µ-Law Coding
Whipp D.
,
GEC Plessey Semiconductors
<"22.pdf">
Constructing High Level Macrocell Models using the Shlaer-Mellor Method
Wolffenbuttel R.F.
,
Delft University of Technology
<"70.pdf">
A Low-Power Low-Voltage Digital Bus Interface for MCM-Based Microsystems
Wouters P.
,
Alcatel Mietec
<"175.pdf">
A 3.3 Volt, low distortion ISDN line driver with a novel quiescent current control circuit
X
(Return to Index)
Xavier B.A.
,
Hughes Network Systems
<"95.pdf">
A 0.9V 960MHz CMOS Radio Front End Employing a Doubly Balanced Transconductance Mixer
Y
(Return to Index)
Yoo H.-J.
,
Kangwon National University, Korea (South)
<"77.pdf">
A Low Noise Folded Bit-Line Sensing Architecture for Multi-Gb DRAM with Ultra High Density 6F² Cell
Yoo J.-S.
,
Korea University
<"124.pdf">
A High Speed, Low Power 8-Tap Digital FIR Filter for PRML Disk-Drive Read Channels
Yoon T.
,
Univ. of California at Los Angeles
<"53.pdf">
1.25 Gb/s CMOS Differential Transimpedance Amplifier for Gigabit Networks
Yoshida N.
,
NEC Corporation, Ibaraki, Japan
A Low-Power, High-Speed 0.25 µm GaAs D-FF
Z
(Return to Index)
Zhang M.
,
IXL-ENSERB
<"92.pdf">
A 1.2µ BiCMOS realization of a low power and offset-free Voltage/Frequency converter
Zorio C.
,
Mixed Silicon Structures
An EEPROM in a Standard CMOS technology
Zou Y.
,
Auburn University
<"171.pdf">
FET Mobility Degradation and Device Mismatch due to Packaging Induced Die Stress