October 1999 5th - 8th

ARCACHON-(France)

 

Organised by

Lab.IXL - UMR CNRS

University of Bordeaux-ENSERB

ADERA

 GENERAL INFORMATION

  SUBMISSION OF FINAL PAPERS

  EQUIPMENT EXHIBITION

  TECHNICAL PROGRAM

  PROGRAM HIGHLIGHTS

  COMMITTEES AND SUB-COMMITTEES

  REGISTRATION FORM

    HOTEL RESERVATION

 with the technical co-sponsorship of :

IEEE - Electron Devices Society

 

GENERAL INFORMATION
ESREF99, the Xth  European Symposium on Reliability of Electron Devices will take place at Bordeaux (France) from 5th to 8th October 1999.
This event will provide an international forum for the presentation of recent developments and future directions in Quality and Reliability of materials, devices and circuits for microelectronics. All aspects of specification, technology and manufacturing, test, control and analysis will be addressed.

The EOBT Conference will take place as a part of ESREF Conference.

 

LOCATION OF THE CONFERENCE :

PALATIUM-ARCACHON (50 km from Bordeaux-Airport)

Phone : 33 (0)5 56 22 47 00 - Fax : 33 (0)5 56 22 55 55

e-mail : www.palais.des.congres.arcachon@wanadoo.fr

 TOP

SUBMISSION OF FINAL PAPERS

The conference proceedings will be printed by ELSEVIER Sciences. Full instructions for camera-ready copy manuscript (two columns, 8 pages for invited papers, 6 pages for regular papers) has been sent to you by the Editor.

The paper should be sent under a WORD or LATEC format:

 

CONFERENCE SECRETARIAT AND ORGANISATION :

ADERA - CONFERENCE ESREF99

162 avenue Albert Schweitzer, BP 196

33608 PESSAC CEDEX - FRANCE

Phone : 33 (0)5 56 15 11 51 - Fax : 33 (0)5 56 15 11 60

e-mail : esref@ixl.u-bordeaux.fr

DEADLINES
21st June 1999 : Closing date for the submission of papers to the chairmen
16th July 1999 : Imperative editor deadline for final manuscript
 

For further information concerning the Scientific Program, please contact :

Michel BARRE

MATRA BAe Dynamics

20-22, rue Grange Dame Rose - BP 150

78141 VELIZY-VILLACOUBLAY CEDEX - FRANCE

Phone : 33 (0)1 34 88 19 61 - Fax 33 (0)1 34 88 19 88

Nathalie LABAT - Frédéric VERDIER

Université Bordeaux 1 - Laboratoire IXL

351 cours de la Libération - 33405 TALENCE CEDEX - FRANCE

Phone : 33 (0)5 56 84 65 45 - Fax : 33 (0)5 56 37 15 45

e-mail : esref@ixl.u-bordeaux.fr

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EQUIPMENT EXHIBITION
The Symposium will feature the latest in service providers, equipment manufacturers and suppliers.
A large exhibit floor will give the opportunity to key-vendors to represent the core business area in these fields.

For further information concerning the equipment exhibition, please contact :

 A. BELLIER - ADERA (France) - voirin@adera.fr

Centre Condorcet, 162 avenue Albert Schweitzer - F-33608 PESSAC CEDEX

Equipment Exhibitors (preliminary list on July 1999) :

AETRIUM Inc.

USA

B & G International

USA

BPS NEXTRAL

France

CARL ZEISS

France

DESTIN N.V.

Belgium

DIGIT CONCEPT

France

ELSEVIER SCIENCE

The Netherlands

EVENTS EUROPA

Switzerland

FEI Europe Ltd

United Kingdom

FIRFAX SYSTEMS

USA

HAMAMATSU PHOTONICS

France

HITACHI-ELEXIENCE

France

HTT High Tech Trade GmbH

Germany

JOHN WILEY & SONS Ltd

England

KARL SUSS

France

KNIGHTS ELECTROGLAS

Germany

LCIE

France

MASER Engineering

The Netherlands

MB Electronique

France

MICRION GmbH

Germany

MICRO INSTRUMENT Co.

USA

ORS

France

PHILIPS Analytical X-RAY

France

QUALITAU Ltd

Israël

RAITH GmbH

Germany

SAGITTA

Israël

SERMA Technologies

France

SILVACO DATA SYSTEMS SARL

France

SONIX Inc.

USA

SONOSCAN

France

VEECO Instruments

France

TOP

TECHNICAL PROGRAM

The conference will concentrate on two main areas of interest in electronics concerning designers, manufacturers and users :

The conference will be preceded by one day Tutorial Short Courses on Tuesday October 5th.

 

The 3rd European FIB Users Group Meeting (EFUG 99) is planned on Monday, October 4th.

A workshop on "Commercial parts (COTS) Management" is scheduled on Tuesday, October 5th.

Two ESREF99 workshops (fees included in conference registration) are organized on October 6th in evening.

The contributed papers cover the following topics : (Oral presentation and Posters)

 Methods for reliability assessment

  • Design and Test for Robustness

  • Modelling and Prediction Methods

  • Yield, Field Returns, Screening Methods

  • Reliability at Design Level

  • Quality and Reliability Assessment Implementation

 

 Failure Mechanisms

  • Detection/ Modelling /Prevention

  • Dielectric and Oxides/Metallizations

  • Hot Carriers/ EOS-ESD/ Electromigration

 EOBT - Electron and Optical Beam Testing

  • Electron Beam and Laser Beam Testing, FIB

  • Scanning Probe Microscopy, Near Field Microscopy

 

 Power and High Temperature Devices

  • Smart-Power Devices, IGBT, Thyristor Failure Mechanisms

  • Thermal Signature, Thermomechanical Fatigue

 

 Advanced Failure Analysis

  • Defect Detection and Analysis Techniques

  • Electrical and Thermal Characterisation

  • Degradation and Reliability Indicators

  • Sample Preparation

 Compound Semiconductors

  • Optoelectronics and Laser Devices

  • Wide Bandgap Semiconductors

  • Microwave and Millimeter-wave Components

  • Compound Semiconductor Failure Analysis

 Packaging and Assemblies

  • Bonding, Solders and other Materials, Joint Reliability

  • BGA, CSP, Flip-chip, Connector Reliability

  • High Density Assemblies, MCM, 3-D’s

  • MEMS and MOEMS

  • Sensor Failure Mechanisms and Reliability

TOP

CONFERENCE PROGRAM

The conference will be preceded by one day Tutorial Short Courses on October 5th.

 

Tuesday, October 5 th

8:00

Registration

9:00

Tutorials T1 :Reliability of high density electronic packages

M. Salagoity

10:30

 Coffee break

10:50

T2 How the quality and reliability world is changing

R. Thomas (Technology Expert Network – USA)

New documents are being written and adopted. ISO-9000 / 2000, AS-9000, TL-9000. Companies are facing multi-market Quality & Reliability requirements that conflict with their manufacturing processes. Large semiconductor manufacturers are resisting attempts by the customer to mandate compliance to these new systems. The IEC is attempting to bring a consolidation of requirements on an international scale. Discussion of the new IEC Unified Integrated Circuit Standard activity. There is a realization that a "standard" set of requirements cannot cover both large and small companies as well as beginning and mature manufacturing operations. What should be a company strategy in the face of the Quality & Reliability chaos ? A discussion of the basic requirements will be covered.

12:20

Lunch

14:00

T3 : Flip-chip and backside techniques

E. Cole (Sandia National Lab. – USA) and K. Bernhard-Höfer (Siemens – Germany)

State-of-the-art techniques for failure localization and design modification through bulk silicon are essential for multi-level metallization and new flip-chip packaging methods. The tutorial reviews the transmission of light through silicon, sample preparation, and backside defect localization techniques that are both currently available and under development. The techniques covered include emission microscopy, scanning laser microscope based techniques (electro-optic techniques, OBIC, LIVA, OBIRCH, TIVA/SEI), and other non-IR based tools (FIB, e-beam techniques, etc.).

15 :30

Coffee break

15:50

T4 : New tools for yield improvement in IC manufacturing. Can they be applied to reliability ?

C. Mc Donald (Intel – USA)

The talk will start with some definitions and discussion of why the probe yield is so important to financial success in IC manufacturing. Simple yield models will demonstrate the main factors influencing yield, and the relationship with reliability of the final product will be discussed. Data will be shown to illustrate the effects. In the last few years, a range of new tools have become available, and these are helping to accelerate the rate of yield improvement and increasing competitive pressures. These tools will be described and practical examples shown of their use. Topics included will be in-line inspection and control, automatic defect classification and data mining techniques. A proposal will be made to extend these techniques to the improvement of reliability performance of products already in manufacturing, by maintaining absolute die identify throughout wafer fabrication, packaging and final test processing.

17:20

Poster Session

18:30

Cocktail offered by Equipment Exhibitors (Program)

 

Wednesday, October 6 th

(Palatium)

8:20

Conference opening

Session A

Methods for reliability assessment

Chairmen : J. MOELTOFT, A.J. Van der POL

Invited Conference

IP 1 8 :30 : Impact of die location on the yield-reliability relation fo deep submicron microprocessors - W. Riordan

A1 9 :10 : (3) Junction parameter for silicon devices characterization - Mialhe P.

A2 9 :30 : (11) Assessment of Worst Case Dielectric Failure Rate Based on Statistical Samples with Pure Intrinsic Failure Distributions - Kerber M.

A3 9 :50 : (15) New rapid method for life time determination of gate oxide in bipolar/CMOS/DMOS technology - Bonnaud O.

A4 10 :10 : (8) A universal field failure based reliability prediction model for SMD Integrated Circuits - Kervarrec G.

10:30

Coffee break (Program)

 

 

Wednesday, October 6 th

(Palatium)

Session B

Failure mechanisms : HCE, Oxides

Chairman : T. MOUTHAAN

Invited Conference

IP2 10 :50 : Influence of pulsed DC current stress on electromigration results in AlCu interconnections : analysis of thermal and healing effects - G. Reimbold / L. Arnaud

B1 11 :30 : (44) Modelling hot-carrier degradation of LDD NMOSFETs by using a high-resolution measurement technique - Dreesen R.

B2 11 :50 : (51) Model for oxide dependence of SILC generation based on anode hole injection process - Ghibaudo G.

B3 12 :10 : (36) Study of stress induced leakage current by using high resolution measurements - De Salvo B.

12:30

Lunch

 

 

Wednesday, October 6 th

(Palatium)

Session B

Failure mechanisms-HCE, Oxides

Chairman : S. CRISTOLOVEANU

B4 14 :00 : (38) Modelling of the temperature and electric field dependence of substrate/gate current with an elastic resonant trap assisted tunnelling mechanism - Riess P.

B5 14 :20 : (19) Temperature dependance of hot carrier induced MOSFET degradation at low gate bias - Park J.T.

B6 14 :40 40 - Temperature acceleration of breakdown and quasi-breakdown phenomena in ultrathin oxides - Bruyeres S.

B7 15 :00 : (78) Trapping Mechanisms in negative bias temperature stressed p-MOSFETs - Thewes R.

B8 15 :20 : (56) Depassivation of latent plasma damage in pMOS devices - Pantisano L.

15 :40

Coffee break

 Session B

Failure mechanisms-ESD

Chairman : A.J. Van der Pol

B9 16 :20 : (16) Extended SPICE-like model accounting for layout effects on snapback phenomenon during ESD events - Salome P.

B10 16 :40 : (29) HBM and TLP ESD robustness in smart power protection structures - Meneghesso G.

B11 17 :00 : (13) Wafer mapping of ESD performance - Reiner C.

17:30

Poster session

See list of the poster papers

 

Workshop

In-situ reliability testing

 Organizer :

J. MANCA (LUC –Belgium)

19 :30

End of sessions (Program) (B continued)

 

 

Wednesday, October 6th

(Olympia)

Session C

EOBT – Thermal analysis

Chairman : L.J. BALK

Invited conference

IP3 14 :00 : Advanced failure analysis techniques - A. Rubio

C1 14 :40 : (67) Fault localisation in IC's by goniometric laser probing of thermal induced surface waves - Claeys W.

C2 15 :00 : (41) Laser interferometric method for ns-time scale thermal mapping of smart power ESD protection devices during ESD stress - Furbock C.

C3 15 :20 : (63) Validation of radiation hardness designs by pulsed laser testing and SPICE analysis - Pouget V.

C4 15 :40 : (25) Front- and backside investigations of thermal and electronic properties of semiconducting devices - Fiege G.

16 :00

Coffee break

Session C

EOBT – Scanning Microscopy

Chairman : W. CLAEYS

C5 16 :20 : (4) A new AFM-based tool for testing dielectric quality and reliability on a nanometer scale - Olbrich A.

C6 16 :40 : (28) Sub-surface analysis of defects in integrated circuits by scanning near-field acoustic microscopy - Cramer R.M.

C7 17 :00 : (54) Quantitative high frequency electric force microscope testing of monolithic microwave integrated circuits at 20 GHz - Mertin W.

17:30

Power devices workshop

Organizer : E. WOLFGANG (Siemens – Germany)

M. CIAPPA (ETH Zürich – Switzerland)

19:30

End of sessions (Program)

 

 

Thursday, October 7th

(Palatium)

Session G

Power devices reliability

Chairman : M. CIAPPA

E. WOLFGANG

Invited Conference

IP7 8 :30 : Power system reliability and robust power converter development - K. Shenaï

G1 9 :10 : (50) Lifetime extrapolation for IGBT modules under realistic operation conditions - Ciappa M.

G2 9 :30 : (72) Long term reliability testing of HV-IGBT modules in worst case traction operation - Fratelli L.

G3 9 :50 : (42) Damage analysis in smart-power technology electrostatic discharge (ESD) protection devices - Pogany D.

G4 10 :10 : (26) Thermal characterisation of power devices by thermal microscopy techniques - Fiege G.

10:30

Coffee break (Program)

Session F

Packaging, Assemblies and Microsystems Reliability

Chairman : M. BRIZOUX

Invited Conference

IP6 10 :50 : Impact of FEM simulation on reliability improvement of packaging - K. Weide

F1 11 :30 : (35) 1/f noise in conductive adhesive bonds under mechanical stress as a sensitive and fast diagnostic tool for reliability assessment - Vandamme L.K.J.

F2 11 :50 : (74) Localization of defects in die-attach assembly by continuous wavelet transform using scanning acoustic microscopy - Bechou L.

F3 12 :10 : (64) Quality and mechanical reliability assessment of wafer-bonded sensors - Petzold M.

12:30

Lunch (Program)

 

 Thursday, October 7th

(Olympia)

Session E

Reliability of compound semiconductor devices

Chairman : F. GARAT

 

Invited Conference

IP5 10 :30 : HBT reliability - T. Henderson

E1 11 :10 : (61) Gold removal in failure analysis of GaAs-based laser diodes - Vanzi M.

E2 11 :30 : (27) Evaluation of P-HEMT MMIC technology PH25 for space applications - Huguet P.

E3 11 :50 : (60) Degradation of AlGaAs/GaAs power HFETs under on-state and off-state breakdown conditions - Dieci D.

E4 12 :10 : (48) Effects of RF life-test on LF electrical parameters of GaAs power MESFET - Malbert N. (Program)

 

 

Thursday, October 7th

(Palatium)

Session D

Advanced failure analysis

Chairman : J.P. FORTEA

Invited Conference

IP4 14 :00 : Failure location and analysis by TEM, FIB (equipped with SIMS), e-beam … - B. Otterloo

D1 14 :40 :(39) TIVA and SEI developments for enhanced front and backside interconnection failure analysis - Cole E.

D2 15 :00 : (24) Enhancing IC-repairs by combining laser direct-writing of Cu and FIB techniques - Remes J.

D3 15 :20 : (34) FIB voltage contrast measurement for enhanced circuit repairs - Desplats R.

D4 15 :40 : (5) Improved SRAM Failure Diagnosis by Current Signature Analysis - Schmitt-Landsiedel D.

D5 16 :00 : (66) Failure analysis method by using different wavelength lasers - Ito S.

D6 16 :20 : (37) Defect localization using voltage contrast Iddq testing - Perdu Ph.

17:30

Bus departure to the gala dinner (Program)

 

 

Friday October 8th

(Palatium)

Session B

Failure Mechanisms

Chairman : T. MOUTHAAN

Invited Conference

IP8 9 :00 : Physical limits and lifetime limitations of semiconductor devices at high temperatures - W. Wondrak

9 :40 : Invited Conference from RCJ’98 conference

10 :00 : Invited Conference from IRPS’99 conference

10:20

Coffee break

Session B

Failure Mechanisms

Chairman : T. MOUTHAAN

B13 10 :40 : (52) Ageing of laser crystallized and unhydrogenated polysilicon thin film transistors - Brahim M.T.

B14 11 :00 : (71) A stochastic approach to failure analysis in electromigration phenomena - Pennetta C.

B15 11 :20 : (76) A new latchup mechanism in complementary bipolar power ICs triggered by backside die attach glue - Van der Pol J.

11:40

Best Paper Award Announcement

12:00

Conference closing

12 :30

Bus departure to Bordeaux Merignac Airport (Program)

 

POSTERS

Session B : Failure Mechanisms

BP1 (14) Hot-hole-induced interface states build-up on deep-submicrometer LDD nMOSFETs - Rafi J.M.

BP2 (21) Transient-induced latch-up triggered by very fast pulses - Bonfert D.

BP3 (43) Extraction and evolution of Fowler-Nordheim tunneling parameters of thin gate oxides under EEPROM-like dynamic degradation – Autran J.L.

BP4 (49) Leakage current variation during two different modes of electrical stressing in undoped hydrogenated n-channel polysilicon thin film transistors (TFTs) - Farmakis F.V.

BP5 (59) Model-independent determination of the degradation dynamics of thin SiO2 films – Rodrighez R.

BP6 (62) Reliability improvement of EEPROM by using WSi2 polycide gate - Bonnaud O.

BP7 (70) Mercury-probe characterization of soft breakdown in thin oxides - Cacciato A.

Session C : EOBT

CP1 (22) Laser beam backside testing of a flip-chip packaged integrated circuit - Kasapi S.

CP2 (33) Electron beam testing of FPGA circuits – Desplats R.

CP3 (55) Voltage contrast measurements on quarter-micron and deep submicrometer structures with an electric force microscope based test system – Behnke U.

CP4 (57) A new bifunctional topography and current probe for scanning force microscope testing of integrated circuits – Bae S.

CP5 (68) Optical method for the measurement of the thermomechanical behaviour of running electronic devices – Claeys W.

Session D : Advanced Failure Analysis

DP1 (46) 2D physical simulation of degradation on transistors induced by FIB exposure of dielectric passivation – Benbrik J.

Session E : Reliability of compound semiconductor devices

EP1 (30) A simpler method for life-testing laser diodes - Vanzi M.

EP2 (58) Cathodoluminescence from hot electron stressed InP HEMTs – Cova P.

Session F

FP1 (7) Contact resistance anomalies of vias before breakdown in accelerated current life tests – Golz W.

FP2 (77) MEMS design for intrinsic material properties extraction and failure analysis studies – Meunier D.

Session G

GP1 (1+2) High Reliability Wire Bonding Connections for IGBT Power Modules - Beck N.

Reliability and lifetime evaluation of different wire bonding solutions for
high power IGBT modules – Hamidi A.

GP2 (47) Reliability of AlN substrates and their solder joints in IGBT power modules - Mitic G.

GP3 (53) Power cycling on press-pack IGBTs : measurements and thermomechanical simulation – Cova P. (Program)

 PROGRAM HIGHLIGHTS

TOP

WORKSHOPS

One Workshop is planned on Monday the 4th of October :
 EFUG (European FIB Users Group)

chaired by : H. BENDER (IMEC - B, bender@imec.be

IMEC, Kapeldreef 75, B-3001 Leuven, Belgium

tel : +32/16/281 304, fax : +/32/16/281 844

e-mail : hugo.bender@imec.be.

For registration (no fee), contact the workshop organiser by e-mail or fax

The meeting is intended to stimulate discussion and to exchange ideas and practical knowledge between FIB users. It is scheduled from 10:00 to 17:00.

The EFUG99 meeting will start with a lecture by Dr G. Auvert on "From Gallium ion source to Focused Ion Beam tool" intended for new FIB-users or as an introduction to the technique.

The programme is divided into sessions addressing the various aspects of FIB applications : Device modification and gas assisted FIB, TEM sample preparation, FIB for failure and materials analysis, Non-semiconductor applications of FIB. Each individual session will be composed of short presentations by FIB users. Contributions will discuss novel applications, new procedures, case studies or basic understanding of the FIB processes.

Each participant can display a picture + A4 page explanation (i.e. a mini-poster) showing results for discussion with the other participants.

The preliminary programme can be consulted at the EFUG web-page http://www.imec.be/6/efug/.

A workshop on "Commercial parts (COTS) management – Parts selection and assessment processes for severe environment and specific applications" is scheduled on . Tuesday, October 5th from 9:30 to 18:00

Sessions and topics retained as a basis for this workshop will be set up in July time scale as the detailed agenda and speakers will be available on the ESREF WEB Site: http://www.ixl.u-bordeaux.fr. A session will be reserved to present unsolicited industrial experience and cases studies. Be free to propose your possible contribution for this open session, in using the Technical contacts next.

This forum is organised by :

Michel BARRE, Aérospatiale Matra / Matra BAe Dynamics, e-mail: mbarre@ matra-def.fr

Tel: 33 (0)134 88 19 61 Fax: 33 (0)134 88 19 88

Gilles DELEUZE, Thomson CSF, e-mail: gilles.deleuze@ttm.thomson-csf.com

Ulf LINDGREN, Ericsson Microwave, e-mail: Ulf.Lindgren@emw.ericsson.se

For registration (fees : 900FF), contact ADERA Service :

Tel: 33 (0)5.56.15.11.58, Fax: 33 (0)5.56.15.11.60, e-mail : rouzairol@adera.fr

The joint program between SUCCESS and PURE regarding either the performance assessment of COTS or the back end qualification of PEMS, wish to welcome for the third issue of the ESREF/SUCCESS Workshop, again in Arcachon in 1999, Parts Engineers to discuss experiences on operational processes dedicated to COTS Part Management.

This event is organised in conjunction with ESREF, and considered as a User Forum to present and debate of the industrial practices related to Commercial Components Selection and Performance / Reliability Management for Applications working under severe operational conditions or just Specific regarding Market runners demonstrated performances.

A whole day is allocated to the Workshop, in order to cover technical and management issues related to either:

- Performance & requirement specification

- Integrity assessment based upon available manufacturer data

- Data & expertise sharing processes with manufacturer

- Dedicated engineering regarding Performance assessment

-Reliability assessment based on Physics of Failure

- Redesign of System level reliability prediction processes.

 

Workshops are planned during the conference on Wednesday, October 6th.

Participation is free for ESREF 99 attendees. These workshops will be devoted to :
 Power devices / electronics integration

chaired by : M. CIAPPA (ETH Zürich - CH, ciappa@iis.ee.ethz.ch)

E. WOLFGANG (Siemens - G, Eckhard.Wolfgang@mchp.siemens.fr)

A number of megatrends are currently leading to mounted structures becommin increasingly compact : the losses in semiconductor devices are declining with every new component generation, and new cooling concepts and materials allow better thermal management. The increasing replacement of mechanics by electronics in motor vehicles (such as steering and braking by wire) is leading to significantly increased switching performance by the power electronics. A factor which makes reliability more difficult is that t he insertion locations for automotive electronics are subject to increasingly higher temperatures (e.g. 110°C). As in preceding years, acknowledged experts will comment o n topical questions and be available for discussions.
 In-situ reliability testing

is organized by work group 104 on in-situ testing of the COMPETE-network (co-ordination of Microelectronics Packaging & interconnection projects : Environment and Trends for the development of European solutions)

Contact person : J. MANCA (LUC-Diepenbeck – Belgium, jmanca@luc.ac.be)

The proposed contents is :

- overview of in-situ reliability techniques

- concepts of in-situ reliability testing :

high measurement resolution of ageing/failure

accelerated tests with more realistic stress conditions

rapid tool for reliability and life time evaluation

- reliability study of passive and active components

- statistical reliability analysis and test plans

TOP

COMMITTEES AND SUB-COMMITTEES

 Steering Committee

 Program Committee

 Technical Subcommittees

 

STEERING COMMITTEE

L.J. BALK

- University of Wuppertal (Germany)

M. BARRE

- MATRA BAe Dynamics (France)

G.M. BRYDON

- QaRel (United Kingdom)

Y. DANTO

- IXL, University of Bordeaux (France)

F. FANTINI

- University of Modena (Italy)

W. GERLING

- SIEMENS (Germany)

L. LONZI

- ST-Microelectronics (Italy)

C. OLSSON

- ERICSSON Radio System (Sweden)

H. MAES

- IMEC (Belgium)

A.J. MOUTHAAN

- University of Twente (The Netherlands)

COMMITTEES AND SUBCOMMITTES

PROGRAM COMMITTEE

Conference Chairman :

A. TOUBOUL  - IXL, University of Bordeaux (France)

Technical Program Chairpersons :

M. BARRE - MATRA BAe Dynamics (France)

N. LABAT - IXL, University of Bordeaux (France)

Conference Scientific Support :

J.L. AUCOUTURIER - IXL, University of Bordeaux (France)

Y. DANTO - IXL, University of Bordeaux (France)

Scientific Secretariat :

F. VERDIER - IXL, University of Bordeaux (France)

Industrial Exhibition :

A. BELLIER - ADERA (France)

 

Organisation Secretariat :

E. DRILLON, Laboratoire IXL

UMR 5818/CNRS - ENSERB - Université Bordeaux 1

351, Cours de la Libération, F-33405 TALENCE CEDEX

 

ADERA (Association pour le Développement de l'Enseignement et des Recherches auprès des Universités, des Centres de recherche et des Entreprises d'Aquitaine)

Centre Condorcet, 162 avenue Albert Schweitzer - F-33608 PESSAC CEDEX

 COMMITTEES AND SUBCOMMITTEES

TECHNICAL PROGRAM SUBCOMMITTEES

A : Quality and Reliability

chaired by :

J.M. MOELTOFT (IAE/Technical Univ. - DK)

Jm@iae.dtu.dk

J. VAN DER POL (Philips Semicond. - NL)

Jacob.vanderPol@nym.sc.philips.com

 

B : Failure Mechanisms

chaired by :

A.J. MOUTHAAN (Univ. Twente - NL)

a.j.mouthaan@el.utwente.nl

S. CRISTOLOVEANU (INPG-ENSERG - F)

sorin@enserg.fr

 

C : Electron and Optical Beam Testing

(EOBT)

chaired by :

L.J. BALK (Univ. Wuppertal - G)

balk@uni-wuppertal.de

W. CLAEYS (Univ. Bordeaux - F)

wclaeys@frbdx11.cribx1.u-bordeaux.fr

 

D : Advanced Failure Analysis Techniques

chaired by :

E. DEMM (Siemens - G)

edemm@dda.siemens.com

J.P. FORTEA (CNES - F)

Jean-Pierre.Fortea@cnes.fr

 

E : Compound Semiconductors

chaired by :

L.K.J. VANDAMME (Univ. Eindhoven - NL)

L.K.J. Vandamme@ele.tue.nl

F. GARAT (ESA-ESTEC -NL)

fgarat@estec.esa.nl

 

F : Packaging, Assemblies and Microsystems

chaired by :

Y. DANTO (Univ. Bordeaux - F)

danto@ixl.u-bordeaux.fr

M. BRIZOUX (Thomson CSF/TTM - F)

MICHEL.BRIZOUX@TTM.thomson-csf.com

 

G : Power Devices

chaired by :

M. CIAPPA (ETH Zurich - SW)

ciappa@iis.ee.ethz.ch

E. WOLFGANG (Siemens - G)

eckhard.wolfgang@zfe.siemens.de

COMMITTEES AND SUBCOMMITTES

 TOP

 

 

REGISTRATION FORM - ESREF 99

Complete and return before :

September 17, 1999

A D E R A SERVICE - ESREF 99

B.P. 196 33608 PESSAC Cedex France

Tel : 33 (0)5 56 15 11 58 - Fax : 33 (0)5 56 15 11 60

E-mail : rouzairol@adera.fr

 

1 - Family name :

First name :

2 - Affiliation :

3 - Address :

 

Department City :

ZIP code : State : Country :

Phone : Fax : E-mail :

 

4 - Registration Fees (including tutorials, the conference proceedings (except for student), lunches and the gala dinner) :

 

Before September 10

  

After September 10

  

¡

4 000 FF

¡

4 400 FF

Attendees, Speakers,

Committee Members

¡

3 000 FF

¡

3 400 FF

University Members

¡

1 500 FF

(copy of student card required)

¡

1 800 FF

(copy of student card required)

Student accompanying a University participant

5 - Bus transportation : Please check

Monday, October 4 at 8:30 a.m. ¡ Monday, October 4 at 6:30 p.m. ¡

6 - Order form number :

7 - ADERA VAT Number

VAT Registration Number

Attention Ø

Obligatory Information

 

8 - Payment :

¡

¡

Either by cheque to ADERA (in French Francs)

or by bank transfer (in French Francs) to BNP Pessac - France -

Account number 30004/ 01071/ 000208 505 05-93

Please send to the secretary a copy of the bank transfer with the name of the participant. On payment by international transfer, pay through SWIFT.

 

or by credit card : MASTER VISA EUROCARD

 

Card holder’name : Expiring on :

Signature : Date

 

N° :

 

ESREF 99

Arcachon - FRANCE – 4 to 8 October 1999

                            

HOTEL ACCOMMODATION

 

Please send this form before September 24th to :

 

PALAIS DES CONGRES D'ARCACHON

Boulevard Veyrier Montagnères - F 33120-ARCACHON

TEL. : 33 (0)5 56 22 47 00 - FAX : 33 (0)5 56 22 55 55

 

FAMILY NAME: First Name:

Address : ............................................................................................................................................

...........................................................................................................................................................

Zip code : Town : Country :

Phone: Fax : e-mail :

I wish to receive ..... reduction vouchers SNCF Air Inter

 

HOTEL

CATEGORY

SINGLE

ROOM

DOUBLE

ROOM

COMPULSORY

DEPOSIT

1* (3 km from Palatium)

2 *

3 *

Sea sight extra cost

174 FF

250 to 300 FF

300 to 350 FF

100 FF

199 FF

290 to 350 FF

400 to 500 FF

100 FF

200 FF

250 FF

400 FF

---

I reserve

  single room

  double room

  twin room

  

in hotel category

1* 2* 3* for the following nights :

October 3 to 4

October 6 to 7

October 4 to 5

October 7 to 8

October 5 to 6

October 8 to 9

 

Payment :

. Check payable : to "S.A. PALATIUM"

. Bank transfer : copy of the bank transfer send to the account :

Bank : CREDIT LYONNAIS Bank N° : 30002 Office : 01831

Account : 0000072119V Key : 24

 By credit card : MASTER VISA EUROCARD

Card’s holder name : Expiring on :

N° :

DATE : SIGNATURE :

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