S. LEFEBVRE, F. COSTA, F. MISEREY, "Influence of the gate internal impedance on losses in a power MOS transistor switching at a high frequency in the ZVS mode", IEEE Transactions on Power Electronics, Volume 17, Issue 1, January 2002, pp. 33-39.

S. LEFEBVRE, F. COSTA, F. MISEREY, "Influence of the gate internal impedance on losses in a power MOS transistor switching at a high frequency in the ZVS mode", IEEE Transactions on Power Electronics, Volume 17, Issue 1, January 2002, pp. 33-39. Copyright - [Précédente] [Première page] [Suivante] - Home

Article : [ART311]

Titre : S. LEFEBVRE, F. COSTA, F. MISEREY, Influence of the gate internal impedance on losses in a power MOS transistor switching at a high frequency in the ZVS mode, IEEE Transactions on Power Electronics, Volume 17, Issue 1, January 2002, pp. 33-39.

Cité dans :[REVUE367] IEEE Transactions on Power Electronics, Volume 17, Issue 1, January 2002.
Cité dans : [DIV367]  Les revues IEEE Transactions on Power Electronics, août 2013.

Auteur : Lefebvre, S.
Auteur : Costa, F.
Auteur : Miserey, F.

Volume : 17
Issue : 1
Date : January 2002
Pages : 33 - 39
Lien : private/LEFEBVRE1.pdf - 7 pages, 154 Ko.
Vers : Bibliographie

Abstract :
In order to use a power metal oxide semiconductor
(MOS) transistor switching in the zero voltage mode at high fre-quencies,
the output capacitance has to be maximal and the input
capacitance minimal. These characteristics are available in the
datasheets. Nevertheless, to choose the transistor ideal for such an
application, having minimal losses, additional characterizations
have to be done in order to complete the datasheets. In particular,
it is necessary to make sure that all the cells of the MOS transistor
can be opened in a time short before the voltage rise time at
turn-off, in order to reduce as low as possible the turn-off losses.
The present paper points out that the gate to source impedance
characterizes the ability of the device to turn-off very quickly
and the knowledge of that parameter is useful to choose a MOS
transistor having minimal losses in very high frequency zero
voltage switching (ZVS) applications.

Index_Terms : High switching frequency, internal gate char-acterization, Poxer MOSFET, source impedance, zero voltage switching mode.

Bibliographie

References : 6
[1] : H. Fujita and H. Akagi, "A 2 MHz, 2 kW voltage-source inverter for low-temperature plasma generator: Implementation of fast switching with a third resonant circuit," in Proc. IEEE Ind. Applicat. Soc., IAS Ann. Meeting, 1997, pp. 1647-1652.
[2] : J. S. Glaser and J. L. Vollin, "Systematic design of high power class D switching DC-DC converter," in Proc. IEEE Power Electron. Spec. Conf. (PESC’97), 1997, pp. 255-261.
[3] : J. A. Sabaté, R. W. Farrington, M. M. Jovanovic, and F. C. Lee, "Effect of FET output capacitance on ZVS of resonant converters," IEEE Trans. Aerosp. Electron. Syst., vol. 32, pp. 255-266, Jan. 1996.
[4] : K. G. Rischmüller, "Switching with power MOSFET’s and IGBTs—50 Hz to 200 kHz," Power Conv. Intell. Motion, PCIM, pp. 194-211, 1990.
[5] : M. F. Schlecht and L. F. Casey, "Comparison of the square-wave and quasiresonant topologies," IEEE Trans. Power Electron., vol. 3, pp. 83-92, Jan. 1988.
[6] : S. Ramo, J. R. Whinnery, and T. Van Duzer, Fields and Waves in Com-munication Electronics, 2nd ed. New York: Wiley, 1953, ch. 11.

Mise à jour le lundi 10 avril 2023 à 18 h 46 - E-mail : thierry.lequeu@gmail.com
Cette page a été produite par le programme TXT2HTM.EXE, version 10.7.3 du 27 décembre 2018.

Les informations contenues dans cette page sont à usage strict de Thierry LEQUEU et ne doivent être utilisées ou copiées par un tiers.
Powered by www.google.fr, www.e-kart.fr, l'atelier d'Aurélie - Coiffure mixte et barbier, La Boutique Kit Elec Shop and www.lequeu.fr.