Wednesday, June 6, 15:55-17:55, 10F Room 1004-7

Chairperson: K.T. Kornegay, Conell Univ.

                    T. Ise, Osaka Univ.

9.1    Dependence of Turn-On and Turn-Off Characteristics on Anode/Gate Geometry of High-Voltage 4H-SiC GTO Thyristors

         J.B. Fedison, T.P. Chow, M. Ghezzo* and J.W. Kretchmer*

         H. Onose, T. Yatsuo, A. Watanabe, T. Yokota, T. Ishikawa, I. Sanpei, T. Someya and Y. Kobayashi

         A. Agarwal, S.-H. Ryu, M. Das, L. Lipkin, J. Palmour and N. Saks*

9.4    Influence of Device and Circuit Parameters on the Switching Losses of an Ultra Fast CoolMOS/SiC-Diode Device-Set: Simulation and Measurement

         J. Petzoldt, T. Reinmann and L. Lorenz*

         Ilmenau Technical Univ. and *Infineon Technologies, Germany

9.5    Comparison and Optimization of Edge Termination Techniques for SiC Power Devices

         D.C. Sheridan, G. Niu, J.N. Merrett and J.D. Cressler

9.6    High Frequency Application of High Transconductance Surface-Channel Diamond Field-Effect Transistors

         H. Umezawa, H. Taniuchi, T. Arima, Y. Ohba, M. Tachiki and H. Kawarada

9.7    Thyristor with Integrated Forward Recovery Protection Function

         F.-J. Niedernostheide, H.-J. Schulze and U. Kellner-Werdehausen*

9.8    Short on-Pulse Reverse Recovery Behavior of Free Wheeling Diode (FWD)

         F. Nagaune, T. Miyasaka, S. Tagami* H. Shigekane and H. Kirihata*

9.9    A New BRT (Base Resistance Controlled Thyristor) Employing Trench Gate and Self-Align Corrugated P-Base

         J.-K. Oh, M.-S. Lim, B.-C. Jeon, M.-K. Han and Y.-I. Choi*

          K.D. Hobart, F.J. Kub, D. Pattanayak*, D. Piccone*, M. Patel*, D. Hits*, R. Rodrigues*, G. Ayele** and C.A. Colinge**

          Naval Research Laboratory, *Silicon Power and **California State Univ., U.S.A.

9.11   A Novel 6.5 kV IGCT for High Power Current Source Inverters

          A. Weber, P. Kern and T. Dalibor

9.12   Impacts of Channel Implantation on Performance of Static Shielding Diodes and Static Induction Rectifiers

          K. Yano, N. Hattori, Y. Yamamoto and M. Kasuga

9.13   Modeling of Ion-Induced Charge Generation in High Voltage Power Devices

          W. Kaindl, G. Solkner*, P. Voss** and G. Wachutka

          Munich Univ. of Technology, *Infineon Technologies and **EUPEC, Germany

9.14   Fine Pattern Effect Leakage Current and Reverse Recovery Characteristics of MPS Diode

          T. Naito, M. Nemoto, A. Nishiura, M. Otsuki*, M. Kirisawa* and Y. Seki*

          D. Druecke and D. Silber

9.16   A Fast & Soft Recovery Diode with Ultra Small Qrr (USQ-Diode) Using Local Lifetime Control by He Ion Irradiation

          K. Nishiwaki, T. Kushida and A. Kawahashi

          G.A.M. Hurkx, E.A. Hijzen, M.A.A. in 't Zandt

9.18   100V Trench MOS Barrier Schottky Rectifier Using Thick Oxide Layer (TO-TMBS)

          T. Shimizu, S. Kunori, M. Kitada and A. Sugai

          K. Yano, S. Honarkhah* and C.A.T. Salama*

9.20   Flip Chip Power MOSFET: A New Wafer Scale Packaging Technique

          A. Arzumanyan, R. Sodhi, D. Kinzer. H. Schofield and T. Sammon

9.21   A 700V Lateral Power MOSFET with Narrow Gap Double Metal Field Plates Realizing Low On-Resistance and Long-Term Stability of Performance

          N. Fujishima, M. Saito*, A. Kitamura*, Y. Urano*. G. Tada* and Y. Tsuruta*

9.22   60V Field NMOS and PMOS Transistors for the Multi-Voltage System Integration

          T. Terashima, F. Yamamoto, K. Hatasako and S. Hine

9.23   High Voltage Device Implementation in 0.5μm LBC6 (BiCMOS-Power) Technology

          S. Pendharkar, T. Debolske, T. Efland, W. Leitz, W. Nehrer, J. Smith and R.V. Taylor

9.24   Low On-Resistance SOI Power MOSFET Using Dynamic Threshold (DT) Concept for High Efficient DC-DC Converter

          Y. Hiraoka, S. Matsumoto and T. Sakai

9.25   Smart PWM Driver in SO-8 for Automotive Solenoid Controls

          K. Yoshida, S. Kiuchi, H. Tobisaka, N. Yaezawa, T. Ohe, S. Furuhata and T. Fujihira

9.26   Mechanism of Power Dissipation Capability of Power MOSFET Devices: Comparative Study between LDMOS and DMOS Transistors

          Y.S. Chung, O. Valenzuela and B. Baird

9.27   A Half-Bridge Driver IC with Newly Designed High Voltage Diode

          K. Watabe, K. Shimizu, H. Akiyama, T. Araki, J. Moritani and M. Fukunaga

9.28   Recessed Trench MOSFET Process without Critical Alignments Makes Very High Densities Possible

          A. Finney, J. Evans*, P. Blair, J. Earnshaw, P. Jerred, K. Lowe, D. Mottram and A. Wood

9.29   Optimization of Safe-Operating-Area Using Two Peaks of Body-Current in Submicron LDMOS Transistors

          S.K. Lee, J.H. Kim, Y.C. Choi, C.J. Kim, H.S. Kang and C.S. Song

9.30   Charge Model for SOI LDMOST with Lateral Doping Gradient

          N. D'Halleweyn, L. Tiemeijer*, J. Benson and W. Redman-White

          Univ. of Southampton, U.K. and *Philips Research Laboratories, The Netherlands

9.31   A Dual-Voltage Self-Clamped IGBT for Automotive Ignition Application

          Z.J. Shen and S.P. Robb*

9.32   Wide Cell Pitch 1200V NPT CSTBTs with Short Circuit Ruggedness

          H. Nakamura, K. Nakamura, S. Kusunoki, H. Takahashi, Y. Tomomatsu, M. Harada and S. Hine

9.33   An Ignition IGBT with Smart Functions in Chip on Chip Technology

          L. Leipold, H. Fischer, W. Kanert, J. Kositza, T. Theobald and C. Xu

9.34   Great Improvement in IGBT Turn-On Characteristics with Trench Oxide PiN Schottky (TOPS) Diode

          M. Nemoto, M. Otsuki*, M. Kirisawa*, Y. Seki*, T. Naito, R.N. Gupta**, C.R. Winterhalter** and H.-R. Chang**

          Fuji Electric R&D, *Fuji Electric, Japan and **Rockwell Science Center, U.S.A.

9.35   The Influence of Body Effect on the Short Circuit Ruggedness of Emitter Ballasted IGBTs

          P.M. Shenoy, G.M. Dolny and A. Bhalla

9.36   High-Functionality Compact Intelligent Power Unit (IPU) for EV/HEV Applications

          G. Majumdar, K.H. Hussein*, K. Takanashi, M. Fukada, J. Yamashita, H. Maekawa, M. Fuku, T. Yamane and T. Kikunaga

          Mitsubishi Electric and *Fukuryo Semicon Engineering, Japan

9.37   Soft-Switching Turn-off Characterization at High Temperature of 1200V Trench IGBT Using Local Lifetime Control

          S. Azzopardi, A. Kawamura and H. Iwamoto*

9.38   A Novel, 1.2kV Trench Clustered IGBT with Ultra High Performance

          O. Spulber, M. Sweet, K. Vershnin, N. Luther-King, M.M. de Souza and E.M.S. Narayanan

9.39   Destruction Mechanism of PT and NPT-IGBTs in the Short Circuit Operation Which Can Explain Various Kinds of Simulated Results

          I. Takata

9.40   A Study of GTBT Characteristics Driven by Pulse Current

          K. Throngnumchai, Y. Shimoida, T. Karaki and H. Kaneko

9.41   Failure Mechanisms of SOI High-Voltage LIGBTs and LDMOSFETs under Unclamped Inductive Switching

          D.M. Garner, F. Udrea, G. Ensell*, K. Sheng, A.E. Popescu, G.A.J. Amaratunga and W.I. Milne

9.42   Design Consideration of 1000V Merged Pin Schottky Diode Using Superjunction Sustaining Layer

          E. Napoli, A.G.M. Strollo

9.43   New Benchmark for RESURF, SOI, and Super-Junction Power Devices

          R.P. Zingg

9.44   A 650V Rated RESURF-Type LDMOS Employing an Internal Clamping Diode for Induced Bulk Breakdown without EPI or Buried Layer

          M.H. Kim, J.J. Kim and Y.S. Choi

9.45   Multiring Active Analogic Protection for Minority Carrier Injection Suppression in Smart Power Technology

          O. Gonnard, G. Charitat, M. Bafleur, P. Lance*, M. Suquet**, J.P. Laine and A. Peyre-Lavigne

          C.K. Jeon, J.J. Kim, Y.S. Choi, M.H. Kim, S.L. Kim, H.S. Kang and C.S. Song

9.47   Investigation of the Gate Dielectric Oxidation Treatment in Trench Gate Power Devices

          M.-J. Lin, C.-W. Liaw, J.-J. Chang, F.-L. Zhang, T.-K. Yen and H.-C. Cheng

9.48   Fabrication of High Aspect Ratio Doping Region by Using Trench Filling Epitaxial Si Growth

          S. Yamauchi, Y. Urakami, N. Tsuji and H. Yamaguchi

9.49   The Monolithic Bidirectional Switch (MBS) in a Matrix Converter Application

          F. Heinke and R. Sittig

          H. Ota, Y. Minoya, N. Terasawa, K. Kuwabara, S. Igarashi*, Y. Nishikawa* and T. Nozawa

9.51   A Novel Gate Drive Circuit for Low-loss System Using IGBT Saturation Voltage Characteristics

          S. Takizawa, S. Igarashi and K. Kuroki

9.52   Physics-Based Dynamic Electro-Thermal Models of Power Bipolar Devices (Pin Diode and IGBT)

          P.M. Igic, P.A. Mawby and M.S. Towers

9.53   Using Two-Dimensional Structures to Model Filamentation in Semiconductor Devices

          P.L. Hower and S. Pendharkar